• KSII Transactions on Internet and Information Systems (TIIS)
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• v.10 no.11
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• pp.5343-5364
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• 2016

Considering the tradeoff between energy consumption and outage behavior in buffer-aided relay selection, a novel energy-efficient buffer-aided optimal relay selection scheme with power adaptation and Inter-Relay Interference (IRI) cancellation is proposed. In the proposed scheme, energy consumption minimization is the objective with the consideration of relay buffer state, outage probability and relay power control, in order to eliminate IRI. The proposed scheme selects a pair of optimal relays from multiple candidate relays, denoted as optimal receive relay and optimal transmit relay respectively. Source-relay and relay-destination communications can be performed within a time-slot, which performs as Full-Duplex (FD) relaying. Markov chain model is applied to analyze the evolution of relay buffer states. System steady state outage probability and achievable diversity order are derived respectively. In addition, packet transmission delay and power reduction performance are investigated with a specific analysis. Numerical results show that the proposed scheme outperforms other relay selection schemes in terms of outage behavior with power adaptation and IRI cancellation in the same relay number and buffer size scenario. Compared with Buffer State relay selection method, the proposed scheme reduces transmission delay significantly with the same amount of relays. Average transmit power reduction can be implemented to relays with the increasing of relay number and buffer size, which realizes the tradeoff between energy-efficiency, outage behavior and delay performance in green cooperative communications.

• The Journal of the Acoustical Society of Korea
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• v.21 no.7
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• pp.648-655
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• 2002

This paper describes implementation of a multi-channel G.723.1 Annex A (G.723.1A) focused on code optimization using a high performance general purpose Digital Signal Processor (DSP), To implement a multi-channel G.723.1A functional complexities of the ITU-T G.723.1A fixed-point C-code are measures an analyzed. Then we sort and optimize C functions in complexity order. In parallel with optimization, we verify the bit-exactness of the optimized code using the ITU-T test vectors. Using only internal memory, the optimized code can perform full-duplex 17 channel processing. In addition, we further increase the number of available channels per DSP into 22 using fast codebook search algorithms, referred to as bit -compatible optimization.

• The Bulletin of The Korean Astronomical Society
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• v.39 no.1
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• pp.54.1-54.1
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• 2014

Kyung Hee University has been developing a CubeSat for the space science mission called SIGMA (Scientific cubesat with Instrument for Global Magnetic field and rAdiation), which includes TEPC (Tissue Equivalent Proportional Counter) and a magnetometer. SIGMA has a 3-unit CubeSat, and the weight is about 3.2 kg. The main payload is TEPC which can measure the Linear Energy Transfer (LET) spectrum and calculate the equivalent dose for the complicated radiation field in the space. The magnetometer is a secondary payload using a miniaturized fluxgate magnetometer. We expect it to have a 1 nT resolution in the dynamic range of ${\pm}65535$ nT. An Attitude Control System (ACS) spins the SIGMA spacecraft 4 rpm with the spin axis perpendicular to the ecliptic plane. Full duplex communication is consists of VHF uplink and S-band and UHF downlink. In this paper, we introduce the system design and the scientific purpose of the SIGMA CubeSat mission.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.4
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• pp.696-706
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• 2007

Multiprocessor system on chip (MPSoC) platform has set a new innovative trend for the System on Chip (SoC) design. With the rapidly approaching billion transistors era, some of the main problem in deep sub-micron technologies characterized by gate lengths in the range of 60-90 nm will arise from non scalable wire delays, errors in signal integrity and un-synchronized communication. These problems may be addressed by the use of Network on Chip (NOC) architecture for future SoC. Most future SoCs will use network architecture and a packet based communication protocol for on chip communication. This paper presents an adaptive wormhole routing with proactive turn prohibition to guarantee deadlock free on chip communication for NOC architecture. It shows a simple muting architecture with five full-duplex, flit-wide communication channels. We provide simulation results for message latency and compare results with those of dimension ordered techniques operating at the same link rates.

• Journal of the Institute of Convergence Signal Processing
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• v.22 no.2
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• pp.57-63
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• 2021

The purpose of this study is to develop a Smart Helmet to safeguard forest firefighting crews and provide on-site information in real time. The Smart Helmet for forest firefingting crews is equipped with a camera, video/voice communication module, GPS, Bluetooth, and LTE module to promote the safety of them, and through the Smart Helmet, the site situation is is transmitted in real time, and full duplex communication is possible. As a result of testing using the Smart Helmet, the control center was able to receive on-site information and communication with on-site forest firefighting crews. Through site evaluation and user evaluation, it was confirmed that the Smart Helmet needs to be improved. The developed Smart Helmet can be used in various ways in forest disasters and forest industry.

• Journal of the Korea Society of Computer and Information
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• v.14 no.12
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• pp.169-180
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• 2009

Generally home networks are based on wired network and wireless network. This makes customers be capable of using electric home appliances and full-duplex multimedia services and controlling the machines without any restrictions of place or time. Now that the scope of home security is being extended, the home networks can be formed with not only personal computer but also home automation, electric home appliances, and etc. But this causes many of attacks of invasion and damages. Therefore in this paper we suggest the SSIP(Secure Session Initiate protocol) model for solving those problems. The SSIP model is able to provide an efficient authentication and reduce the time of session re-establishment and set-up by adding ability of SIP authentication to Cluster-to-Cluster environment performed on home gateway.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.10a
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• pp.671-674
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• 2012

Recently, depending on the development of smart devices, a variable services have been offered to meet user's convenience. Due to these advance, the needs of users are extremely being diversified and more specific. In that situation, the needs for the N-Screen system has been varied and gradually evolved. An existing N-Screen system that use the way of video streaming upload its multimedia contents to their own cloud server so that might take a long play-reaction time and the number of user is limited by the server's performance. Because of the web based protocol adopted by existing N-Screen system, there are many different problems like high delay, overhead and something caused by simplex data communications. Therefore, to solve the problems above, this study proposes an application based on HTML5. This application supports Video tag and Progressive download via HTML5 so that improves the play-reaction time for multimedia contents. This system can also get rid of the chronic problems such as an access limitation for lots of users as per video streaming encoding. Also, through web sockets, this study proposes a system that has lower delay than the existing system and communicates in full duplex to be able to link dynamically.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.41 no.5
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• pp.531-538
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• 2016

In this paper, we have proposed MIMO-IBFD system that can transmit and receive multiple data stream at the same time in the single band, and analyze the system. We have confirmed that MIMO-IBFD system requires multiple RF cancellation and multiple Digital cancellation techniques. In simulation, we have analyzed characteristic of received signal on MIMO-IBFD system, and evaluate system performance of conventional $2{\times}2$ MIMO system and MIMO-IBFD system. As simulation results, we have confirmed that MIMO-IBFD system can transmit and receive multiple data stream at the same time in the single band by using multiple RF and digital cancellation techniques. Additionally, we have confirmed that BER performance of $2{\times}2$ MIMO-IBFD system with low-level QAM modulation is similar to performance of $2{\times}2$ MIMO system, and BER performance of $2{\times}2$ MIMO-IBFD system with high-level QAM modulation is degraded in comparison with $2{\times}2$ MIMO system with high-level QAM modulation. We can confirm that MIMO-IBFD system requires high level self-interference cancellation technique in order to use high level modulation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.6
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• pp.1107-1114
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• 2004

System Packet Interface Level 4 Phase 2(SPI-4.2) is an interface for packet and cell transfer between a physical layer(PHY) device and a link layer device, for aggregate bandwidths of OC-192 ATM and Packet Over Sonet/SDH(POS), as well as 10Gbps Ethernet applications. SPI-4.2 core consists of Tx and Rx modules and supports full duplex communication. Tx module of SPI-4.2 core writes 64-bit data word and 14-bit header information from the user interface into asynchronous FIFO and transmits DDR(Double Data Rate) data over PL4 interface. Rx module of SPI-4.2 core operates in vice versa. Tx and Rx modules of SPI-4.2 core are designed to support maximum 256-channel and control the bandwidth allocation by configuring the calendar memory. Automatic DIP4 and DIP-2 parity generation and checking are implemented within the designed core. The designed core uses Xilinx ISE 5.li tool and is described in VHDL Language and is simulated by Model_SIM 5.6a. The designed core operates at 720Mbps data rate per line, which provides an aggregate bandwidth of 11.52Gbps. SPI-4.2 interface core is suited for line cards in gigabit/terabit routers, and optical cross-connect switches, and SONET/SDH-based transmission systems.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.38 no.3
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• pp.304-315
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• 2001

In this paper, we peformed the real-time implementation of AMR(Adaptive Multi-Rate) speech coding algorithm which is adopted for IMT-2000 service using TMS320C6201, i.e., a Texas Instrument´s fixed-point DSP. With the ANSI C source code released from ETSI, optimization is performed to make it run in real-time with memory as small as possible using the C compiler and assembly language. Implemented AMR speech codec has the size of 32.06 kWords program memory, 9.75 kWords data RAM memory, and 19.89 kWords data ROM memory. And, The time required for processing one frame of 20 ms length speech data is about 4.38 ms, and it is short enough for real-time operation. It is verified that the decoded result of the implemented speech codec on the DSP is identical with the PC simulation result using ANSI C code for test sequences. Also, actual sound input/output test using microphone and speaker demonstrates its proper real-time operation without distortions or delays.