• Journal of Korea Society of Industrial Information Systems
• /
• v.19 no.4
• /
• pp.17-24
• /
• 2014

In this paper, we propose a CMOS FM RX front-end structure with an automatic tunable input matching network and implement it using a 65nm CMOS technology. The proposed FM RX front-end is designed to change the resonance frequency of the input matching network at the low noise amplifier (LNA) according to the channel frequency selected by a phase-locked loop (PLL) for maintaining almost constant sensitivity level when an embedded antenna type with high frequency selectivity characteristic is used for FM receiver. The simulation results of implemented FM front-end show about 38dB of voltage gain, below 2.5dB of noise figure, and -15.5dBm of input referred intercept point (IIP3) respectively, while drawing only 3.5mA from 1.8V supply voltage including an LO buffer.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.13 no.11
• /
• pp.2267-2272
• /
• 2009

The six-port direct conversion receiver front-end that is comprised of a carrier recovery and a phase shifter, which gets the same structure with six-port phase correlator using the multi-layer coupled line, was designed and fabricated in this paper. The six-port element that is comprised of the power divider and the hybrid coupler is designed by multi-layer coupled line structure. The multi-coupled structure is utilized as the basic structure in receiver phase correlator, carrier recovery circuit and phase shifter. The receiver front-end with the same multi-layer coupled line structure for the receiver elements shows the simple structure and no difficulty in integration. The fabricated multi-layer coupled six-port receiver front-end re-generates the carrier signal with a constant phase and demodulates the PSK transmission signal.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.31 no.7C
• /
• pp.735-742
• /
• 2006

In this paper, we explain the operation scheme and fixed-point design method of DFE (Digital Front End), which performs DC offset compensation, automatic frequency control, and automatic gain control over the input signal to the UE (User Equipment) receiver of IEEE 802.16e OFDMA-TDD system. Then, we analyze the performance of DFE under ITU-R M. 1225 Veh-A 60km/h channel environment. To optimize the fixed-point design of DFE, we reduce the number of bit resulted from calculation without performance degradation, leading to the decreased complexity of the operation in H/W, and design the Loop filter with considering trade-off between the Acquisition time and the Stability.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.49 no.12
• /
• pp.242-246
• /
• 2012

This paper presents an integrated low noise and highly linear wideband RF front-end for a digital terrestrial and cable TV tuner, which are used as a part of double-conversion TV tuner. The low noise amplifier (LNA) has a low noise figure and high linearity by adopting a noise canceling technique based on current amplification. The up-conversion mixer and SAW buffer have high linearity by employing a third order intermodulation cancellation technique. The proposed RF front-end is designed in a $0.18{\mu}m$ CMOS and draws 60 mA from a 1.8 V supply voltage. The RF front-end shows a voltage gain of 30 dB, an average single side-band noise figure of 4.2 dB, an IIP2 of 40 dBm, and an IIP3 of -4.5 dBm for the entire band from 48 MHz to 862Hz.

• Journal of IKEEE
• /
• v.14 no.4
• /
• pp.257-262
• /
• 2010

We design a CMOS front-end with wide variable gain and low power consumption for 5.25 GHz band. To obtain wide variable gain range, a p-type metal-oxide-semiconductor field-effect transistor (PMOS FET) in the low noise amplifier (LNA) section is connected in parallel. For a mixer, single balanced and folded structure is employed for low power consumption. Using this structure, the bias currents of the transconductance and switching stages in the mixer can be separated without using current bleeding path. The proposed front-end has a maximum gain of 33.2 dB with a variable gain range of 17 dB. The noise figure and third-order input intercept point (IIP3) are 4.8 dB and -8.5 dBm, respectively. For this operation, the proposed front-end consumes 7.1 mW at high gain mode, and 2.6 mW at low gain mode. The simulation results are performed using Cadence RF spectre with the Taiwan Semiconductor Manufacturing Company (TSMC) $0.18\;{\mu}m$ CMOS technology.)

• Journal of the Korean Institute of Rural Architecture
• /
• v.20 no.2
• /
• pp.19-28
• /
• 2018

This study investigated the basic data of architectural design about framework dimensions inherent in a folk house of Yeosu city generally and systematically. We investigated the common dimensions of framework constitution for folk house (main building) seen a lot in Yeosu city. Most of the folk houses in Yeosu city were common people houses built from the end of 19th century to the 1960s and have maintained the same style for a long time. As a result of the study, common dimensions were calculated in two ways. One is Front toi/3ryang house and the other is Front/back toi/2kozu5ryang house. Front/back toi house was large in the case of full width, total height, and member thickness but, width of the front kan is no big difference. In other words, the scale of Front toi house and Front/back toi house is difference only in the rest except front kan (width). Among calculated common dimensions, the front kan of Front toi house and Front/back toi house in the plan, the kitchen is the widest, and the size is the same at 8.7 chucks degree. The next became small little by little in order of room 1(main room), room 2(center room), room 3(end room). As a result, the size of the room 3 of Front toi house reaches 7.7 chucks, and room 3 of Front/back toi house reaches 8.0 chucks. In the section dimensions, pillar height is in sum of floor height and pillar core height, Front toi house is 7.9 chucks, and Front/back toi house is 8.2 chucks. The investigation of basic data of architectural design is not only makes possible to grasp specific and simple to three-dimensional universal aspect on framework dimensions, but also documentation of folk house design know-how is done, and the architectural design standards of Korean folk house is written in the contents according to the area.

• Smart Media Journal
• /
• v.6 no.4
• /
• pp.65-71
• /
• 2017

In this paper, we propose a design method for the construction of LTE-based small unmanned aerial vehicle control system to quickly and reliably collect multiple small unmanned aerial vehicle position information simultaneously flying all over the country. In particular, the main requirements are the network (N/W), hardware (H/ W), software(SW), Database(DB), development architecture, and business needs. To satisfy these requirements, N/W, H/W, SW, DB design, and architectural design plan were suggested regarding the design requirements of a small UAV system. To effectively control the small unmanned multi-party system in the system design, the architecture is divided into the front-end service area and the back-end service area according to the function and role of the unit system. In the front-end service area that grasps and controls the position and state of small unmanned aerial vehicles (UAVs), we have studied the design part that can be expanded to N through TCP/IP network by applying Client PC method.

• Journal of Power Electronics
• /
• v.16 no.1
• /
• pp.190-204
• /
• 2016

An active front end (AFE) is required for a three-phase induction motor (IM) fed by a voltage source inverter (VSI), because of the increasing need to derive quality current from the utility end without sacrificing the power factor (PF). This study investigates a proportional-plus-integral (PI) controller based AFE topology that uses a super-lift converter (SLC). The significance of the proposed SLC, which converts rectified AC supply to geometrically proceed ripple-free DC supply, is explained. Variations in several power quality parameters in the intended IM drive for 0% and 100% loading conditions are demonstrated. A simulation is conducted by using MATLAB/Simulink software, and a prototype is built with a field programmable gate array (FPGA) Spartan-6 processor. Simulation results are correlated with the experimental results obtained from a 0.5 HP IM drive prototype with speed feedback and a voltage/frequency (V/f) control strategy. The proposed AFE topology using SLC is suitable for three-phase IM drives, considering the supply end PF, the DC-link voltage and current, the total harmonic distortion (THD) in supply current, and the speed response of IM.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.60 no.12
• /
• pp.2286-2292
• /
• 2011

In this paper we present the design of Low Noise Amplifier(LNA), mixer and filter for RF front-end part of partial discharge monitoring system. The monitoring system of partial discharge in high voltage power machinery is used to prevent many kinds of industrial accidents, and is usually composed of three parts - sensor, RF front-end and digital microcontroller unit. In our study, LNA, mixer and filter are key components of the RF front-end. The LNA consists of common gate and common source-cascaded structure and uses the resistive feedback for broad band matching. A coupled line structure is utilized to implement the filter, of which size is reduced by the meander structure. The mixer is designed using dual gate structure for high isolation between RF and local oscillator signal.

• Proceedings of the IEEK Conference
• /
• 2004.08c
• /
• pp.776-779
• /
• 2004

A RF front-end module is designed for GIS(Gas Insulated Substation) which is employed for effective and efficient very high voltage transmission. Major advantage of the unit is improved PO detection sensitivity through minimizing the effect of surrounding interference signals, which is achieved by controlling the gain and the selection of the frequency band, for the precise detection of any UHF PO (Partial Discharge) disturbance occurred in the GIS due to some unwanted problems. For the development of the module, various switches for providing selected signal paths, wideband LNA, 3 BPF for selecting detection frequency band, and video detector are designed, fabricated and measured on 1 mm FR4 substrate with various RF components. The detection sensitivity of the unit was <-60 dBm that is sufficient to detect UHF PO signals as low as 1 pC. It is believed that the value is enough to detect the signal occurred in GIS.