• Title/Summary/Keyword: Frequency Margin

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An Improved Active Damping Method with Capacitor Current Feedback

  • Geng, Yi-Wen;Qi, Ya-Wen;Liu, Hai-Wei;Guo, Fei;Zheng, Peng-Fei;Li, Yong-Gang;Dong, Wen-Ming
    • Journal of Power Electronics
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    • v.18 no.2
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    • pp.511-521
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    • 2018
  • Proportional capacitor current feedback active damping (CCFAD) has a limited valid damping region in the discrete time domain as (0, $f_s/6$. However, the resonance frequency ($f_r$) of an LCL-type filter is usually designed to be less than half the sampling frequency ($f_s$) with the symmetry regular sampling method. Therefore, ($f_s/6$, $f_s/2$) becomes an invalid damping region. This paper proposes an improved CCFAD method to extend the valid damping region from (0, $f_s/6$ to (0, $f_s/2$), which covers all of the possible resonance frequencies in the design procedure. The full-valid damping region is obtained and the stability margin of the system is analyzed in the discrete time domain with the Nyquist criterion. Results show that the system can operate stably with the proposed CCFAD method when the resonance frequency is in the region (0, $f_s/2$). The performances at the steady and dynamic state are enhanced by the selected feedback coefficient H and controller gain $K_p$. Finally, the feasibility and effectiveness of the proposed CCFAD method are verified by simulation and experimental results.

6-Gbps Single-ended Receiver with Continuous-time Linear Equalizer and Self-reference Generator (기준 전압 발생기와 연속 시간 선형 등화기를 가진 6 Gbps 단일 종단 수신기)

  • Lee, Pil-Ho;Jang, Young-Chan
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.9
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    • pp.54-61
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    • 2016
  • A 6-Gbps single-ended receiver with a linear equalizer and a self-reference generator is proposed for a high-speed interface with the double data rate. The proposed single-ended receiver uses a common gate amplifier to increase a voltage gain for an input signal with low voltage level. The continuous-time linear equalizer which reduces gain to the low frequencies and achieves high-frequency peaking gain is implemented in the common gate amplifier. Furthermore, a self-reference generator, which is controlled with the resolution 2.1 mV using digital averaging method, is implemented to maximize the voltage margin by removing the offset noise of the common gate amplifier. The proposed single-ended receiver is designed using a 65-nm CMOS process with 1.2-V supply and consumes the power of 15 mW at the data rate of 6 Gbps. The peaking gain in the frequency of 3 GHz of the designed equalizer is more than 5 dB compared to that in the low frequency.

High Speed Low Power Decision-Feedback Equalizer Techniques (고속 저전력 결정-피드백 이퀄라이저 기술 동향)

  • Min, Woong-Ki;Kong, Bai-Sun
    • Journal of IKEEE
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    • v.20 no.3
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    • pp.285-290
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    • 2016
  • Inter-symbol interference (ISI) due to channel bandwidth limitation constrains the maximum data rate in high speed I/O. Decision feedback equalizer (DFE) is known as the most popular technique for removing ISI. To ensure fast data transmission, not only removing ISI but also raising maximum operating frequency of the circuit itself by relaxing feedback delay margin is important. For single-ended signaling, DFE should cancel out both ISI and high frequency noises. Low-power operation is as important as fast operation because required DFE elements increase as the data rate goes up. This paper surveys recent techniques for fast DFE by removing ISI and high frequency noises, and low power DFE and discusses about their merits and limitations.

Dynamic Characteristics Improvement of a Step-Down Chopper Using Load Current Feed-Forward Compensator (부하전류 전향보상기를 이용한 강압쵸퍼의 동특성 항상)

  • Chun, Ji-Young;Jeon, Kee-Young;Chung, Chun-Byung;Han, Kyung-Hee
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.22 no.12
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    • pp.29-35
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    • 2008
  • In this paper, The author present a load current feed-forward compensator by method that improve voltage controller of Step-down Chopper to get stable output voltage to sudden change of load current. To confirm the characteristics of a presented load current feed-forward compensator compared each transfer function of whole system that load current feed-forward compensator is added with transfer function of whole system that existent voltage controller is included using Mason gains formula in Root locus and Bode diagram. As a result the pole of system is improved, extreme point of the wave and system improves, and size of peak value and phase margin of break frequency in resonance frequency confirmed that is good. Therefore, presented control technique could confirm that reduce influence by perturbation and improves stationary state and dynamic characteristics in output of Step-down Chopper.

Design of a 48MHz~1675MHz Frequency Synthesizer for DTV Tuners (DTV 튜너를 위한 48MHz~1675MHz 주파수합성기 설계)

  • Ko, Seung-O;Seo, Hee-Teak;Kwon, Duck-Ki;Yu, Chong-Gun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.5
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    • pp.1125-1134
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    • 2011
  • In this paper a wideband frequency synthesizer is designed for DTV tuners using a $0.18{\mu}m$ CMOS process. It satisfies the DTV frequency band(48~1675MHz). A scheme is proposed to cover the full band using only one VCO and reliable broadband characteristics are achieved by reducing the variations of VCO gains and frequency steps. The simulation results show that the designed VCO has frequency range of 1.85~4.22GHz, phase noise at 4.22GHz of -89.7dBc/Hz@100kHz, gains of 62.4~95.8MHz/V(${\pm}21.0%$) and frequency steps of 22.9~47.9MHz(${\pm}35.3%$). The designed VCO has a phase noise of -89.75dBc/Hz at 100kHz offset. The designed synthesizer has a lock time less than $0.15{\mu}s$. The measured VCO tuning range is 2.05~3.4GHz. The frequency range is shifted down but still satisfy the target range owing to the design for enough margin. The designed circuit consumes 23~27mA from a 1.8V supply, and the chip size including PADs is $2.0mm{\times}1.5mm$.

A Study on A Mathematical Formulation of Protection Ratio and Its Calculation for Fixed Radio Relay System with Diversity (다이버시티를 갖는 고정 무선 중계 시스템에 대한 보호비의 수학적 표현과 계산에 대한 연구)

  • Suh Kyoung-Whoan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.4 s.107
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    • pp.358-367
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    • 2006
  • In this paper, a mathematical formulation of protection ratio and its calculation method are suggested for a radio relay system with diversity techniques. The analysis of protection ratio and its physical meaning have been performed for the space or frequency diversity system, and in particular protection ratios are reviewed in terms of the parameters of diversity improvement factor, which comprises antenna gain, separation distance between antennas, frequency and its difference between carriers, and distance. As one of simulated results, the co-channel protection ratio of 60 dB is obtained for the space diversity system regarding 6.2 GHz, 60 km, 64-QAM, and 25 m between antennas, which gives 15 dB less than the co-channel protection ratio of the non-space diversity system. In addition, the co-channel protection ratio for the frequency diversity system gives 64 dB in case of frequency offset of 0.5 GHz under the same conditions as the space diversity system, which brings about 11 dB less than the co-channel protection ratio of non-frequency diversity system. In consequency, it is interesting to note that the space diversity system is less sensitive to interference in comparison to the frequency diversity system and provides better quality of service for a given interference.

A CMOS Voltage Driver for Voltage Down Converter (전압 강하 변환기용 CMOS 구동 회로)

  • 임신일;서연곤
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.5B
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    • pp.974-984
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    • 2000
  • A CMOS voltage driver circuit for voltage down converter is proposed. An adaptive biasing technique is used to enhance load regulation characteristics. The proposed driver circuit uses the NMOS transistor as a driving transistor, so it does not suffer from large Miller capacitances which is one of the problems with conventional PMOS driving transistor, and hence achieves good phase margin and stable frequency response. No additional complex circuit for frequency compensation such as compensation capacitor is required in this implementation. For the same current capability, the size of NMOS transistor in driver circuit is smaller than that of PMOS counterpart. So the smaller die area can be achieved. The circuits is implemented using a 0.8 ${\mu}{\textrm}{m}$ CMOS process and has a die area of 150 ${\mu}{\textrm}{m}$ x 360 ${\mu}{\textrm}{m}$. Proposed circuit has a quiescent power of 60 . In the current driving range from 100 $mutextrm{A}$ to 50 ㎃, load regulation of 5.6 ㎷ is measured.

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Transmissibility Effect Evaluation of Buildings Near Railroad Areas (철도인접지역 건물에 대한 진동전달율의 영향성 평가)

  • Kim, Ji-Hyeon;Yoon, Sung-Won
    • Journal of Korean Association for Spatial Structures
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    • v.11 no.1
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    • pp.131-138
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    • 2011
  • For train vibration influence assessment of newly constructed buildings in building design levels, 4 train measured vibration acceleration responses were used to compare with TR theory values and suitability of TR values was proposed. Through this TR method, construction planned grounds located near railroad areas were selected and ground vibration measurement was conducted. Through natural frequency by MIDAS, vertical acceleration response, and ground frequency from measured vibration response, TR was calculated and vibration prediction was conducted. As a result of comparing acceleration response estimate applying TR and measured value of train vibration acceleration response, it was found that it was in 3.61%~37.1% of margin of error. Clear peak of 7.19~10.61Hz in KTX, Gyungeuisun, and cement train were confirmed.

Power-Minimizing DVFS Algorithm Using Estimation of Video Frame Decoding Complexity (영상 프레임 디코딩 복잡도 예측을 통한 DVFS 전력감소 방식)

  • Ahn, Heejune;Jeong, Seungho
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38B no.1
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    • pp.46-53
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    • 2013
  • Recently, intensive research has been performed for reducing video decoder energy consumption, especially based on DVFS (Dynamic Voltage and Frequency Scaling) technique. Our previous work [1] has proposed the optimal DVFS algorithm for energy reduction in video decoders. In spite of the mathematical optimality of the algorithm, the precondition of known frame decoding cycle/complexity limits its application to some realistic scenarios. This paper overcomes this limitation by frame data size-based estimation of frame decoding complexity. The proposed decoding complexity estimation method shows over 90% accuracy. And with this estimation method and buffer underflow margin of around 20% of frame size, almost same power consumption reduction performance as the optimal algorithm can be achieved.

Theoretical and experimental analysis of the lateral vibration of shafting system using strain gauges in 50,000-DWT oil/chemical tankers (스트레인 게이지를 이용한 5만 DWT 석유화학제품 운반선의 횡진동 분석에 관한 연구)

  • Lee, Jae-Ung
    • Journal of Advanced Marine Engineering and Technology
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    • v.40 no.4
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    • pp.301-306
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    • 2016
  • During the initial stage of propulsion shaft design, the shaft alignment process includes a thorough consideration of lateral vibration to verify the operational safety of the shaft. However, a theoretical method for analyzing forced lateral vibrations has not been clearly established. The methods currently used in classification societies and international standards can only ensure a sufficient margin to avoid the blade-passing frequency resonance speed outside the range of ${\pm}20%$ of the maximum continuous rating (MCR) for the engine. Typically, in shaft alignment analyses, longer center distances between the support bearings promote affirmative results, but the blade order resonance speed can approach the lower limit for lateral vibration. Therefore, this matter requires careful attention by engineers, and a verification of the theoretical analysis by experimental measurements is highly desirable. In this study, both theoretical and experimental analyses were conducted using strain gauges under two draught conditions of vessels used as 50,000-DWT oil/chemical tankers, introduced recently as eco-friendly ships. Based on the analyses, the influence of the lateral vibration on the shafting system and the system's reliability was reviewed.