• Title/Summary/Keyword: Formal verification

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The Analysis Textbooks and Instruction Activities of Construction Contents in 7th Mathematics Curriculum (7차 수학과 교육과정 작도 영역의 교과서와 수업사례 분석)

  • 조완영;정보나
    • School Mathematics
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    • v.4 no.4
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    • pp.601-615
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    • 2002
  • This paper analyzed <7-나> and <8-나> textbooks and teacher instruction activities in classrooms, focusing on procedures used to solve construction problems. The analysis of the teachers' instruction and organization of the construction unit in <7-나> textbooks showed that the majority of the textbooks focused on the second step, i.e., the constructive step. Of the four steps for solving construction problems, teachers placed the most emphasis on the constructive order. The result of the analysis of <8-나> textbooks showed that a large number of textbooks explained the meaning of theorems that were to be proved, and that teachers demonstrated new terms by using a paper-folding activities, but there were no textbooks that tried to prove theorems through the process of construction. Here are two alternative suggestions for teaching strategies related to the construction step, a crucial means of connecting intuitive geometry with formal geometry. First, it is necessary to teach the four steps for solving construction problems in a practical manner and to divide instruction time evenly among the <7-나> textbooks' construction units. The four steps are analysis, construction, verification, and reflection. Second, it is necessary to understand the nature of geometrical figures involved before proving the problems and introducing the construction part as a tool for conjecture upon theorems used in <8-나> textbooks' demonstrative geometry units.

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A Minimization Technique for BDD based on Microcanonical Optimization (Microcanonical Optimization을 이용한 BDD의 최소화 기법)

  • Lee, Min-Na;Jo, Sang-Yeong
    • The KIPS Transactions:PartA
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    • v.8A no.1
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    • pp.48-55
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    • 2001
  • Using BDD, we can represent Boolean functions uniquely and compactly, Hence, BDD have become widely used for CAD applications, such as logic synthesis, formal verification, and etc. The size of the BDD representation for a function is very sensitive to the choice of orderings on the input variables. Therefore, it is very important to find a good variable ordering which minimize the size of the BDD. Since finding an optimal ordering is NP-complete, several heuristic algorithms have been proposed to find good variable orderings. In this paper, we propose a variable ordering algorithm based on the $\mu$O(microcanonical optimization). $\mu$O consists of two distinct procedures that are alternately applied : Initialization and Sampling. The initialization phase is to executes a fast local search, the sampling phase leaves the local optimum obtained in the previous initialization while remaining close to that area of search space. The proposed algorithm has been experimented on well known benchmark circuits and shows superior performance compared to a algorithm based on simulated annealing.

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Search space pruning technique for optimization of decision diagrams (결정 다이어그램의 최적화를 위한 탐색공간 축소 기법)

  • Song, Moon-Bae;Dong, Gyun-Tak;Chang, Hoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.8
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    • pp.2113-2119
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    • 1998
  • The optimization problem of BDDs plays an improtant role in the area of logic synthesis and formal verification. Since the variable ordering has great impacts on the size and form of BDD, finding a good variable order is very important problem. In this paper, a new variable ordering scheme called incremental optimization algorithm is presented. The proposed algorithm reduces search space more than a half of that of the conventional sifting algorithm, and computing time has been greatly reduced withoug depreciating the performance. Moreover, the incremental optimization algorithm is very simple than other variable reordering algorithms including the sifting algorithm. The proposed algorithm has been implemented and the efficiency has been show using may benchmark circuits.

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Extracting Subsequence of Boolean Variables using SAT-solver (만족가능성 처리기를 이용한 이진 변수 서브시퀀스 추출)

  • Park, Sa-Choun;Kwon, Gi-Hwon
    • The KIPS Transactions:PartD
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    • v.15D no.6
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    • pp.777-784
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    • 2008
  • Recently in the field of model checking, to overcome the state explosion problem, the method of using a SAT-solver is mainly researched. To use a SAT-solver, the system to be verified is translated into CNF and the Boolean cardinality constraint is widely used in translating the system into CNF. In BCC it is dealt with set of boolean variables, but there is no translating method of the sequence among Boolean variables. In this paper, we propose methods for translating the problem, which is extracting a subsequence with length k from a sequence of Boolean variables, into CNF formulas. Through experimental results, we show that our method is more efficient than using only BCC.

A Study on the Test Data Generation for the COS API Quality Evaluation (COS API 품질 평가를 위한 테스트 데이터 생성에 관한 연구)

  • Yeom, Hee-Gyun;Kim, Sang-Young;Hwang, Sun-Myung
    • Proceedings of the Korea Information Processing Society Conference
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    • 2001.10a
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    • pp.367-370
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    • 2001
  • 최근 다양한 어플리케이션과 전용 임베디드 시스템의 개발 필요성이 증가하고 있으며 이는 Smart Community를 추구하는 디지털 지식사회의 중요한 이슈가 되고 있다. 현재 상용화되고 있는 대부분의 실시간 임베디드 시스템들을 다양한 측면에서 자사의 제품 기준에 따르는 기술적 특징과 성능 지표를 제공하고 있으며 이를 통한 성능 품질 등의 판단 근거로 제시되고 있다. 그러나 각 자료들이 공인 기관에서 제공되지 않아 자료의 신뢰도가 낮으며 따라서 성능측정 및 품질척도로 비교하는데는 어려움이 있다 따라서 본 연구는 이러한 문제점을 착안하여 자바 카드 API의 품질 평가를 위해서 사전에 테스트를 거쳐 좀더 신뢰성과 안전성이 높은 자바 카드 애플릿을 개발하고자 한다. 이에 가장 중요한 부분 중에 하나인 에러체크를 통해 임의적으로 에러 처리 시나리오를 작성해서 그 시나리오를 거친 테스트 데이터를 생성한 후, 그 데이터를 가지고 API의 풀질 평가를 하고자 하는데 목적이 있다. 이에 본 논문에서는 테스트 데이터 생성 시나리오를 제안하였다. 단지 제안만 해 놓았기 때문에 향후 이 시나리오를 거친 테스트 데이터 생성을 연구하고자 한다. 또한, Verification을 위해 수학에 기초를 둔 정형 기법(Formal Method)을 이용하여 좀더 깊이 있고, 정확한 검증을 수행 하고자 한다.

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An Efficient Interoperability Test methodologyBased on Hierarchically Organized State Space ("계층 상태공간 축약방법"에 기반한 효율적인 상호운용성 시험 방법론)

  • Choe, Young-Han;Chin, Byoung-Moon;Lee, Dong-Ik;Jin, Seong-Il
    • The Transactions of the Korea Information Processing Society
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    • v.5 no.8
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    • pp.2091-2101
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    • 1998
  • Interoperability(lOP) is one of the major goal of Information Technology and Telecommunication fields. In this paper, we discuss dcvclOlJing an interoperabiiity testing(IOPT) method. As is easily gueOisecl from conformance testing and formal verification. state space explosion problem is the most serious problem we encounter in deriving interoperability test method and its test suite. A new state space reduction method to support interoperability testing is suggested based on Petri nets. The proposed test method can be applied to 1 to many communication protocols as well as 1 to 1 communication protocols efficiently

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Formal Verification of Digital Power Plant System Designed by STATECHART (STATECHART 로 설계한 Digital Plant Protection System 의 정형 검증)

  • Kim, Il-Gon;Kim, Jin-Hyun;Nam, Won-Hong;Lee, Na-Young;Kwak, Hee-Hwan;Choi, Jin-Young
    • Proceedings of the Korea Information Processing Society Conference
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    • 2001.04a
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    • pp.185-188
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    • 2001
  • 원자력 발전소 내장형 시스템과 같이 시스템 오작동으로 인하여 엄청난 재난을 불러올 수 있는 시스템은 시스템을 구축하기 이전에 완전한 설계 및 검증이 절대적으로 필요하다. 이에 따라 원자력 발전소의 비상 차단 시스템과 같이 고도의 안정성을 요하는 부분에 대해 정형 명세 언어인 STATECHART 를 이용하여 명세하고 테스팅하는 연구가 있어 왔다. 하지만 테스팅 기법만으로는 시스템에서 생길 수 있는 예기치 못한 오류들을 정확히 검출해 낼 수 없다. 그래서 본 논문에서는 시스템의 보다 높은 안전성과 신뢰성을 제공하기 위해 원자력 발전소 비상 차단 시스템인 DPPS(Digital Plant Protection System)를 분석하여 이를 시각적 기반의 설계 명세 언어인 STATECAHRT를 이용하여 명세함으로써 설계자와 구현자간의 의사 소통을 원활하게 전달함은 물론 모델 체킹 검증 도구인 SMV 로 검증함으로써 실제 원자력 발전소 비상 차단 시스템의 신뢰성과 안전성을 높이고자 한다.

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Interactive Augmented-Reality Authoring Tool (대화식 증강현실 저작 도구)

  • Kim, Iljin;Seo, Jinseok
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2009.10a
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    • pp.181-184
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    • 2009
  • Authoring AR(augmented-reality) contents not only takes too much time and cost, but also needs the help of professionals in the areas of computer science, VR(virtual reality), AR, 3D computer graphics, computer vision, etc. This paper proposes an authoring tool to allow non-programmers as content creators to author AR contents easily and quickly. An ideal AR authoring tool, which is the goal of our research, faces four major challenges from a technical point of view: (1) easy and quick authoring, (2) strong power of expression, (3) ease of verification and validation, (4) interactive authoring and debugging. To tackle with the challenges, we employ the interactive framework approach using formal and visual specification techniques.

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Improvement of a Verified Secure Key Distribution Protocol Between RFID and Readers (RFID와 리더간의 안전성이 검증된 키 분배 프로토콜의 개선)

  • Bae, Woo-Sik;Lee, Jong-Yun
    • The KIPS Transactions:PartC
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    • v.18C no.5
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    • pp.331-338
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    • 2011
  • The RFID system includes a section of wireless communication between the readers and the tags. Because of its vulnerability in terms of security, this part is always targeted by attackers and causes various security problems including the leakage of secret and the invasion of privacy. In response to these problems, various protocols have been proposed, but because many of them have been hardly implementable they have been limited to theoretical description and theorem proving without the accurate verification of their safety. Thus, this study tested whether the protocol proposed by Kenji et al. satisfies security requirements, and identified its vulnerabilities such as the exposure of IDs and messages. In addition, we proposed an improved RFID security protocol that reduced the number of public keys and random numbers. As one of its main characteristics, the proposed protocol was designed to avoid unnecessary calculations and to remove vulnerabilities in terms of security. In order to develop and verify a safe protocol, we tested the protocol using Casper and FDR(Failure Divergence Refinements) and confirmed that the proposed protocol is safe in terms of security. Furthermore, the academic contributions of this study are summarized as follows. First, this study tested the safety of a security protocol through model checking, going beyond theorem proving. Second, this study suggested a more effective method for protocol development through verification using FDR.

Model Verification of a Safe Security Authentication Protocol Applicable to RFID System (RFID 시스템에 적용시 안전한 보안인증 프로토콜의 모델검증)

  • Bae, WooSik;Jung, SukYong;Han, KunHee
    • Journal of Digital Convergence
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    • v.11 no.4
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    • pp.221-227
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    • 2013
  • RFID is an automatic identification technology that can control a range of information via IC chips and radio communication. Also known as electronic tags, smart tags or electronic labels, RFID technology enables embedding the overall process from production to sales in an ultra-small IC chip and tracking down such information using radio frequencies. Currently, RFID-based application and development is in progress in such fields as health care, national defense, logistics and security. RFID structure consists of a reader that reads tag information, a tag that provides information and the database that manages data. Yet, the wireless section between the reader and the tag is vulnerable to security issues. To sort out the vulnerability, studies on security protocols have been conducted actively. However, due to difficulties in implementation, most suggestions are concerned with theorem proving, which is prone to vulnerability found by other investigators later on, ending up in many troubles with applicability in practice. To experimentally test the security of the protocol proposed here, the formal verification tool, CasperFDR was used. To sum up, the proposed protocol was found to be secure against diverse attacks. That is, the proposed protocol meets the safety standard against new types of attacks and ensures security when applied to real tags in the future.