• Title/Summary/Keyword: Formal Specification

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Requirement Verification to Improve Reliability of the Requirement Specification in Object-Oriented Software Development (객체 지향 소프트웨어 개발에서 요구 사양의 신뢰성을 향상시키기 위한 요구 검증)

  • 정안나;염근현
    • Proceedings of the Korean Information Science Society Conference
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    • 1998.10b
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    • pp.579-581
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    • 1998
  • 소프트웨어 개발에서 나타나는 많은 오류는 요구 사항에 대한 정확한 이해의 부족에서 기인된다. 따라서 분석 단계에서 요구사항을 정확하게 나타내는 활동은 전체 소프트웨어의 신뢰성에 큰 영향을 미치게 된다. 요구 검증은 요구 분석 활동에서 산출되는 정보가 요구 문서의 정보를 바르게 나타내는가를 검증하는 활동이다. 본 연구에서는 객체 지향 소프트웨어의 개발에서 요구 검증을 수행하기 위해 OFL(Object-oriented Formal Language)과 질의 추출을 적용하였다. OFL은 객체 지향 형식 상태변이사항(Formal state transition specification)으로 형식 언어가 기자고 있는 명확성을 유지하며 분석 활동의 결과를 체계적으로 제시한다. 이러한 결과와 요구 문서와의 비교를 위하여 질의 추출이 수행된다. 이는 질의를 통하여 요구 문서에서는 나타나는 정보를 체계적으로 정리하여 개발 의뢰자가 제시한 요구 사항과 개발자가 제시하는 요구 사양간에 일치성과 완전성이 존재함을 검증한다. 이러한 요구 검증은 요구 사양의 신뢰성뿐만 아니라 개발되는 소프트웨어의 신뢰성을 향상시킨다.

Effective Human Resource Management through knowledge based systems and formal methods (지식베이스 시스템과 형식 방법을 이용한 효과적인 인적자원 관리)

  • 서의호;변대호
    • Korean Management Science Review
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    • v.10 no.2
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    • pp.145-161
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    • 1993
  • Human Resource Management (HRM) performs numerous activities in organizations including employee recruitment, selection, placement, job analysis, training and development, and labor relations. POSCO (Pohang Steel Company) has concerned with employee management related to job placement and analysis among these activities because of the problems of over-complexity of placement precedures for the variety of recruits, the frequency of selection, a large amount of job descriptions / specifications, and their changes. This study, as a phase of developing the entire HRM systems in the organization, briefly summarizes the preliminary information related and describes an implementation of expert system as a means for effective job placement based on the principle of right-person-in-right-place with identifying aptitudes and personalities of employees. Thus, a new approach for developing a job description/specification using a formal specification language like Z is also proposed. The result of this study will cultivate the performance of personnel, prevent conflicts between labor and management, promote overall productivity of organization, as well as helpfully verify job analysis.

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Formal Specification & Analysis models for Cryptographic protocol (암호 프로토콜의 정형적 사양 및 분석 기법)

  • 이진석;신기수;이강수
    • Review of KIISC
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    • v.5 no.1
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    • pp.25-46
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    • 1995
  • 소프트웨어 개발에서, 사용자 요구 사항을 잘 표현하면 할수록 시스템은 오류가 적고, 사용자가 요구하는 시스템으로 만들어지며, 시스템 검증이 쉬워지는 것 같이, 정형적 사양(formal specification)은 시스템 개발 전반에 영향을 준다. 이 정형적 사양은 암호 프로토콜이 완전(completeness)하고 안전(soundness)한가를 검증하는 데에도 유용하게 사용될 수 있다. 암호 프로토콜을 사양하고 분석하는 방법은 크게 대수적, 논리적, 상태 변환적 접근 방법등과 통신 프로토콜의 검증에 쓰는 패트리넷을 이용한 방법등이 있다. 이들 방법중에는 프로그램으로 구현되어 자동 검증 tool로 개발된 사례도 있다. 본 고에서는 암호 프로토콜을 위한 사양 기법과 그에 따른 분석 기법을 알아보고 그것들을 비교, 분석하였다.

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Study on Z specification for S/W Safety of Computer Based Interlocking Systems (전자연동장치 S/W 안전성 확보를 위한 Z 방법표현에 관한 연구)

  • Ahn, Jin;Lee, Jongwoo
    • Journal of the Korean Society for Railway
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    • v.20 no.1
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    • pp.55-63
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    • 2017
  • Railway interlocking systems which are safety-critical systems are rapidly changed from relay-based systems to computer-based systems which have high flexible. Computer-based interlocking systems (CBI) are consisted of hardware and software in which system safeties arise one of important problems. The interlocking software of the CBI influences directly to the system safeties. "z" notation is one of formal methods have been used for system software specification to secure system safety. In this paper, the specification of interlocking logics for CBI systems is realized using "z" notation and verifies it with Z/EVES.

Equivalence Checking for Statechart Specification (Statechart 명세의 등가 관계 검사)

  • Park, Myung-Hwan;Bang, Ki-Seok;Choi, Jin-Young;Lee, Jeong-A;Han, Sang-Yoong
    • Journal of KIISE:Computing Practices and Letters
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    • v.6 no.6
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    • pp.608-619
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    • 2000
  • In this paper, we give a formal semantics for Statechart via a translation into Algebra of Communicating Shared Hesources(ACSR). Statechart is a very rich graphical specification language, which is suitable to specify complicated reactive systems. However, the incorporation of graph into specification and rich syntax makes Statechart semantics very complicated and ambiguous. Thus, it is very difficult to verify the correctness of Statechart specifications. Also, we propose the formal verification method for Statechart specifications by showing equivalence relation between two Statechart specifications. This makes it possible to combine the advantages of a graphical language with the rigor of process algebra.

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A Security Software Development Methodology Using Formal Verification Tools (정형 검증 도구를 이용한 보안 소프트웨어 개발 방안)

  • Jang, Seung-Ju
    • Journal of KIISE:Computing Practices and Letters
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    • v.12 no.2
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    • pp.141-148
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    • 2006
  • This paper suggests method of safe security S/W by verifying and its result of formal verification tool. We will survey many formal verification tools and compare features of these tools. And we will suggest what tool is appropriate and methodogoly of developing safe security S/W. The Z/EVES is the most appropriate tool. This paper proposes formal verification of ACS by using RoZ tool which is formal verification tool to create UML model. The specification and verification are executed using Z/EVES tool. These procedures can find weak or wrong point of developed S/W.

Defining Semantics of Live Sequence Chart Specification (Live Sequence Chart 명세언어의 의미론적 정의)

  • Lee, Eun-Young
    • Journal of the Korea Society of Computer and Information
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    • v.11 no.6 s.44
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    • pp.49-57
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    • 2006
  • While developing a complex reactive software system. it is very important to analyze the user requirement and reflect it to the developed system. Therefore understanding the need of users precisely and promptly is the key to the successful software system development. Among several requirement specification languages, message sequence charts (MSCs), also known as sequence diagrams in UML are the most widely used scenario notation. Live Sequence Charts (LSCs) are a variant ot MSCs, characterized by its message abstraction facility and the modality of scenarios. In this paper, I define the formal semantics of LSC specification including the essential language constructs such as pre-charts, variables, assignment and conditions. The range of the formalized LSC language has been broadened, and the scope of the formalized semantics is much closer to the complete LSC specification.

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System of Systems Approach to Formal Modeling of CPS for Simulation-Based Analysis

  • Lee, Kyou Ho;Hong, Jeong Hee;Kim, Tag Gon
    • ETRI Journal
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    • v.37 no.1
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    • pp.175-185
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    • 2015
  • This paper presents a system-of-systems (SoS) approach to the formal modeling of a cyber-physical system (CPS) for simulation-based analysis. The approach is based on a convergence technology for modeling and simulation of a highly complex system in which SoS modeling methodology, hybrid systems modeling theory, and simulation interoperation technology are merged. The methodology maps each constituent system of a CPS to a disparate model of either continuous or discrete types. The theory employs two formalisms for modeling of the two model types with formal specification of interfaces between them. Finally, the technology adapts a simulation bus called DEVS BUS whose protocol synchronizes time and exchange messages between subsystems simulation. Benefits of the approach include reusability of simulation models and environments, and simulation-based analysis of subsystems of a CPS in an inter-relational manner.

Formal tests for State-model based Specifications on Software Components (상태모델에 기반한 소프트웨어 컴포넌트 명세의 정형적 테스트)

  • Seo, Dongsu
    • The Journal of Korean Association of Computer Education
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    • v.7 no.6
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    • pp.129-139
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    • 2004
  • In developing highly reliable systems such as C4I systems formal methods provide both developers and clients with assurance that they are in the right development processes. This paper investigates into techniques for formal specifications and tests for software components where rigorous verification is required. In particular, the paper suggests decomposition techniques for state-model based specifications using the weakest precondition, and suggests test methods for the specification by generating black box test-cases.

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An Analysis Methodology for Probabilistic Specification and Execution Prediction for Improving of Reliability of Fault-Tolerant Real-Time Systems (내고장 실시간 시스템의 신뢰도 향상을 위한 확률 명세 및 실행 예측 분석 방법)

  • Lee, Chol;Lee, Moon-Kun
    • Journal of KIISE:Software and Applications
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    • v.29 no.12
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    • pp.926-939
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    • 2002
  • The formal specification methods with probability have been demanded in the area of fault real-time systems, in order to specify the uncertainty that the systems can encounter during their execution due to various environmental factors. This paper presents a new formal method with probability. namely Probabilistic Abstract Timed Machine (PATM), in order to analyze and predict system's behavior in dynamical environmental changes, This method classifies the factors into two classes: the variable and the constant. The analysis of system's behavior is performed on the probabilistic reachability graph generated from the ATM specification for the system. The analysis can predict any possibility that the behavior may not satisfy some safety requirements of the system, indicate which variable factors cause such satisfaction, and further recover from this unsatisfying fault state by fixing the variable factors. Consequently the reliability to the fault real-time systems can be improved.