• Journal of Ocean Engineering and Technology
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• v.24 no.1
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• pp.178-184
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• 2010

Today, there has been a decrease in international shipping because of the weakening in global economies. Therefore, shipowners are thinking more about Floating Production Storage and Offloading (FPSO), which can perform functions related to the transporting, storage, and tracking of crude oil from oil wells. Given the huge expense of these special ships, shipowners require workers who can solve problems quickly and secure sustainable production functions in this age of globalization. Furthermore, it is important to design, construct, and maintain facilities so that a ship remains in operation over a long term. This paper discusses a system that uses knowledge-based AR to help workers improve their understanding and deal with pipeline equipment problems safely. In addition, it displays a 3CAD model and status information for products to improve their recognition on the FPSO that they intend to inspect. At the same time, the system works quickly and offers solutions for dangerous circumstances or malfunctions. It thus helps to maintain the functionality of the FPSO throughout its life-cycle.

• Journal of Ocean Engineering and Technology
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• v.32 no.1
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• pp.21-27
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• 2018

The design and analysis of a quayside mooring system for safe mooring of Prelude FLNG under extreme environmental conditions were carried out. The design of the mooring system considered the yard operation conditions and maximum wind speed during a typhoon. In order to secure the mooring safety of Prelude FLNG under an extreme environment, a special steel structure was designed between the quay and Prelude FLNG to maintain the distance from the quay to a certain extent to avoid a collision with the inclined base. The mooring safety was also ensured by installing additional new parts on the quay. A mooring analysis and mooring safety review were performed with more rigorous modeling considering the nonlinearity of the mooring rope and fender. In order to secure additional safety of the mooring system under extreme environmental conditions, a safety assessment was conducted on the failures of the mooring components proposed in the marine mooring guidelines. Based on the results of the mooring analysis, it was confirmed that the Prelude FLNG can be safely moored even under the extreme conditions of typhoons, and a worst case scenario analysis verified that the mooring system design was robust enough. The proposed mooring analysis and design method will provide a basis for the safe mooring of ultra-large floating offshore structures of similar size in the future.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.140-142
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• 2011

In this paper, special purpose arithmetic unit for mobile graphics accelerator is designed. The designed processor supports six operations, such as $1/{\chi}$, $\frac{1}{{\sqrt{x}}$, $log_2x$, $2^x$, $sin(x)$, $cos(x)$. The processor adopts 2nd-order polynomial minimax approximation scheme based on IEEE floating point data format to satisfy accuracy conditions and has 5-stage pipeline structure to meet high operational rates. The SFAU processor consists of 23,000 gates and its estimated operating frequency is about 400 Mhz at operating condition of 65nm CMOS technology. Because the processor can execute all operations with 5-stage pipeline scheme, it has about 400 MOPS(million operations per second) execution rate. Thus, it can be applicable to the 3D mobile graphics processors.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.4
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• pp.727-736
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• 2009

In this paper, the $arccos(cos^{-1})$ arithmetic unit for mobile graphics accelerator is designed. The mobile vector graphics applications need tight area, execution time, power dissipation, and accuracy constraints compared to desktop PC applications. The designed processor adopts 2nd-order polynomial approximation scheme based on IEEE floating point data format to satisfy speed and accuracy conditions and reduces area via hardware sharing structure. The arccosine processor consists of 15,280 gates and its estimated operating frequency is about 125Mhz at operating condition of $0.35{\mu}m$ CMOS technology. Because the processor can execute arccosine function within 7 clock cycles, it has about 17 MOPS(million arccos operations per second) execution rate and can be applicable to mobile OpenVG processor. And because of its flexible architecture, it can be applicable to the various transcendental functions such as exponential, trigonometric and logarithmic functions via replacement of ROM and minor hardware modification.

• Journal of Ecology and Environment
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• v.38 no.3
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• pp.375-381
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• 2015

We investigated the influence of summer rainfall on Pectinatella magnifica colonies in lotic ecosystems. Of the examined substrate materials, branches and aquatic macrophytes supported more colonies of P. magnifica than that by stones or artificial materials. The influence of rainfall on P. magnifica colonies differed in accordance with the type of substrate material at each study site. In the Geum River, little difference was noted in the number of P. magnifica colonies on branches before ($mean{\pm}SE$, $24{\pm}7.3$ individuals) and after rainfall ($20{\pm}8.4$ ind.); other substrate types supported fewer colonies of P. magnifica after rainfall. In contrast, in the Miryang River, rainfall had minimal effect on the number of P. magnifica colonies supported by macrophytes ($13{\pm}3.8$ and $12{\pm}4.3$ ind., respectively). Artificial material was more abundant in the Banbyeon Stream where it was able to support more colonies of P. magnifica. We found that the structure of different substrates sustains P. magnifica following rainfall. In the Miryang River, free-floating and submerged plants with a relatively heterogeneous substrate surface were the dominant macrophytes, whereas in the Geum River, simple macrophytes (i.e., emergent plants) were dominant. Therefore, we conclude that the substrate type on which P. magnifica grows plays an important role in resisting physical disturbances such as rainfall.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.1
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• pp.1-5
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• 2012

In this paper, matching characteristic of MIM (metal-insulator-metal) capacitor with $Al_2O_3/HfO_2/Al_2O_3$ (AHA) structure is analyzed. The floating gate capacitance measurement technique (FGMT) was used for analysis of matching characteristic of the MIM capacitors in depth. It was shown that matching coefficient of AHA MIM capacitor is 0.331%${\mu}m$ which is appropriate for application to analog/RF integrated circuits. It was also shown that the matching coefficient has a more strong dependence on the width than length of MIM capacitor.

• Korean Institute of Interior Design Journal
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• no.22
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• pp.61-68
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• 2000

This paper illustrates what the reality of architectural concepts, materials, notions and phenomena are as central questions of contemporay space design. These issues form the goal of modern space design which should attain to the reality of an era when non-real values prevail. Despite the trends of an everchanging and ephemeral dominating quality in architecture for the last ten years, architects still aim to contruct everlasting space on earth. The trends of dematerialization in today's space design can be substantiated in spatial-temporal dimensions as follows. First of all, ephemeral architecture with concepts of hypothetical temporality, everchanging architecture in fluidity, and the transparent architecture with the floating and overlapping image can be analyzed in the dimension of 'time'. In terms of 'space', void quality for the expression of emptiness, neutral space by the simplified and summarized forms, expanded space through ambiguous boundaries and spatial repetition can becharacterized and also be intended strategies for lightness, state of flux, ambiguity, paradox etc., lead modern space design along that path. As this point, we need to pay attention to the so-called 'hypersurface' concept proposed by Stephen Perella. Hypersurface is a sort of cladding sheathing existence independent from the primary structure. With it, the integration between form and image can be achieved. Sometimes hypersurface can be a strategical screen for image projection, a cognitive receptor for surroundings as well as a catalyst for information and communication systems. When the situation dematerializes more and more as the years go on, the concept of hypersurface can be an inclusive method between the phenomenological form in architecture and its self recipient image. Permissive atmospheres created between them in contemporary space design and new paradigms emerged with digital technology will further reinforce the human space's dynamism.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.307-307
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• 2014

정보화 시대로 접어들면서 동일한 공간에 더 많은 정보를 저장할 수 있고, 보다 빠른 동작이 가능한 비휘발성 메모리 소자에 대한 요구가 증가하고 있다. 하지만, 최근 비휘발성 메모리 소자 관련 연구보고에 따르면, 메모리 소자의 소형화 및 직접화 측면에서, 전하 저장을 기반으로 하는 기존의 Floating-Gate(FG) Flash 메모리는 20 nm 이하 공정에서 한계가 예측 되고 있다. 따라서, 이러한 FG Flash 메모리의 한계를 해결하기 위해, 기존에 FET 기반의 FG Flash 구조와 같은 3 terminal이 아닌, Diode와 같은 2 terminal로 동작이 가능한 ReRAM, PRAM, STT-MRAM, PoRAM 등 저항변화를 기반으로 하는 다양한 종류의 차세대 메모리 소자가 연구되고 있다. 그 중, 저항 변화 메모리(ReRAM)는 CMOS 공정 호환성, 3D 직접도, 낮은 소비전력과 빠른 동작 속도 등의 우수한 동작 특성을 가져 차세대 비휘발성 메모리로 주목을 받고 있다. 또한, 상하부 전극의 2 terminal 만으로 소자 구동이 가능하기 때문에 Passive Crossbar-Array(CBA)로 적용하여 플래시 메모리를 대체할 수 있는 유력한 차세대 메모리 소자이다. 하지만, 이를 현실화하기 위해서는 Passive CBA 구조에서 발생할 수 있는 Read Disturb 현상, 즉 Word-Line과 Bit-Line을 통해 선택된 소자를 제외하고 주변의 다른 소자를 통해 흐르는 Sneak Leakage Current(SLC)를 차단하여 소자의 메모리 State를 정확히 sensing하기 위한 연구가 선행 되어야 한다. 따라서, 현재 이러한 이슈를 해결하기 위해서, 많은 연구 그룹에서 Diodes, Threshold Switches와 같은 ReRAM에 Selector 소자를 추가하는 방법, 또는 Self-Rectifying 특성 및 CRS 특성을 보이는 ReRAM 구조를 제안 하여 SLC를 차단하고자 하는 연구가 시도 되고 있지만, 아직까지 기초연구 단계로서 아이디어에 대한 가능성 정도만 보고되고 있는 현실 이다. 이에 본 논문은 Passive CBA구조에서 발생하는 SLC를 해결하기 위한 새로운 아이디어로써, 본 연구 그룹에서 선행 연구로 확보된 안정적인 저항변화 물질인 SiN를 정류 특성을 가지는 n-Si/Ti 기반의 Schottky Diode와 결합함으로써 기존의 CBA 메모리의 Read 동작에서 발생하는 SLC를 차단 할 수 있는 1SD-1R 구조의 메모리 구조를 제작 하였으며, 본 연구 결과 기존에 문제가 되었던 SLC를 차단 할 수 있었다.

• Macromolecular Research
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• v.10 no.5
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• pp.253-258
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• 2002

The multi-wall carbon nanotubes (MWNTs) with graphite crystal structure were synthesized by the catalytic decomposition of a ferrocene-xylene mixture in a quartz tube reactor to use as the conductive filler in the binary polymer matrix composed of poly(vinylidene fluoride) (PVdF) and poly(vinyl pyrrolidone) (PVP) for the EMI (electromagnetic interference) shielding applications. The yield of MWNTS was significantly dependent on the reaction temperature and the mole ratio of ferrocene to xylene, approaching to the maximum at 800 $^{\circ}C$ and 0.065 mole ratio. The electrical conductivity of the MWNTs-filled PVdF/PVP composite proportionally depended on the mass ratio of MWNTs to the binary polymer matrix, enhancing significantly from 0.56 to 26.7 S/cm with the raise of the mass ratio of MWNTs from 0.1 to 0.4. Based on the higher electrical conductivity and better EMI shielding effectiveness than the carbon nanofibers (CNFs)-filled coating materials, the MWNTs-filled binary polymer matrix showed a prospective possibility to apply to the EMI shielding materials. Moreover, the good adhesive strength confirmed that the binary polymer matrix could be used for improving the plastic properties of the EMI shielding materials.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.11a
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• pp.35-38
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• 2002

In this paper, the characteristics of channel hot electron (CHE) injection for the write operation in a NOR-type SONOS flash memory with common source line were investigated. The thicknesses of he tunnel oxide, the memory nitride， and the blocking oxide layers for the gate insulator of the fabricated SONOS devices were $34{\AA}$, $73{\AA}$, and $34{\AA}$, respectively. The SONOS devices compared to floating gate devices have many advantages, which are a simpler cell structure, compatibility with conventional logic CMOS process and a superior scalability. For these reasons, the introduction of SONOS device has stimulated. In the conventional SONOS devices, Modified Folwer-Nordheim (MFN) tunneling and CHE injection for writing require high voltages, which are typically in the range of 9 V to 15 V. However CHE injection in our devices was achieved with the single power supply of 5 V. To demonstrate CHE injection, substrate current (Isub) and one-shot programming curve were investigated. The memory window of about 3.2 V and the write speed of $100{\mu}s$ were obtained. Also, the disturbance and drain turn-on leakage during CHE injection were not affected in the SONOS array. These results show that CHE injection can be achieved with a low voltage and single power supply, and applied for the high speed program of the SONOS memory devices.