• 제목/요약/키워드: Flip Chip Bump

검색결과 138건 처리시간 0.044초

무연솔더를 이용한 실리콘 압력센서의 플립칩 패키지 (Flip-Chip Package of Silicon Pressure Sensor Using Lead-Free Solder)

  • 조찬섭
    • 한국산업융합학회 논문집
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    • 제12권4호
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    • pp.215-219
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    • 2009
  • A packaging technology based on flip-chip bonding and Pb-free solder for silicon pressure sensors on printed circuit board (PCB) is presented. First, the bump formation process was conducted by Pb-free solder. Ag-Sn-Cu solder and the pressed-screen printing method were used to fabricate solder bumps. The fabricated solder bumps had $189-223{\mu}m$ width, $120-160{\mu}m$ thickness, and 5.4-6.9 standard deviation. Also, shear tests was conducted to measure the bump shear strength by a Dage 2400 PC shear tester; the average shear strength was 74 g at 0.125 mm/s of test speed and $5{\mu}m$ shear height. Then, silicon pressure sensor packaging was implemented using the Pb-free solder and bump formation process. The characteristics of the pressure sensor were analogous to the results obtained when the pressure sensor dice are assembled and packaged using the standard wire-bonding technique.

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CdTe 멀티에너지 엑스선 영상센서 패키징 기술 개발 (Development of Packaging Technology for CdTe Multi-Energy X-ray Image Sensor)

  • 권영만;김영조;유철우;손현화;김병욱;김영주;최병정;이영춘
    • 한국방사선학회논문지
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    • 제8권7호
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    • pp.371-376
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    • 2014
  • CdTe 멀티에너지 X선 영상센서와 ROIC를 패키징 하기 위한 flip chip bump bonding, Au wire bonding 및 encapsulation 공정조건을 개발하였으며 성공적으로 모듈화 하였다. 최적 flip chip bonding 공정 조건은 접합온도 CdTe 센서 $150^{\circ}C$, ROIC $270^{\circ}C$, 접합압력 24.5N, 접합시간 30s일 때이다. ROIC에 형성된 SnAg bump의 bonding이 용이하도록 CdTe 센서에 비하여 상대적으로 높은 접합온도를 설정하였으며, CdTe센서가 실리콘 센서에 비하여 쉽게 파손되는 것을 고려하여 접합압력을 최소화하였다. 패키징 완료된 CdTe 멀티에너지 X선 모듈의 각각 픽셀들은 단락이나 합선 등의 전기적인 문제점이 없는 것을 X선 3D computed tomography를 통해 확인할 수 있었다. 또한 Flip chip bump bonding후 전단력은 $2.45kgf/mm^2$ 로 측정되었으며, 이는 기준치인 $2kgf/mm^2$ 이상으로 충분한 접합강도를 가짐을 확인하였다.

플렉시블 전자기기 응용을 위한 미세 솔더 범프 접합부에 관한 연구 (Study on Joint of Micro Solder Bump for Application of Flexible Electronics)

  • 고용호;김민수;김택수;방정환;이창우
    • Journal of Welding and Joining
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    • 제31권3호
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    • pp.4-10
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    • 2013
  • In electronic industry, the trend of future electronics will be flexible, bendable, wearable electronics. Until now, there is few study on bonding technology and reliability of bonding joint between chip with micro solder bump and flexible substrate. In this study, we investigated joint properties of Si chip with eutectic Sn-58Bi solder bump on Cu pillar bump bonded on flexible substrate finished with ENIG by flip chip process. After flip chip bonding, we observed microstructure of bump joint by SEM and then evaluated properties of bump joint by die shear test, thermal shock test, and bending test. After thermal shock test, we observed that crack initiated between $Cu_6Sn_5IMC$ and Sn-Bi solder and then propagated within Sn-Bi solder and/or interface between IMC and solder. On the other hands, We observed that fracture propated at interface between Ni3Sn4 IMC and solder and/or in solder matrix after bending test.

Flip Chip Assembly Using Anisotropic Conductive Adhesives with Enhanced Thermal Conductivity

  • Yim, Myung-Jin;Kim, Hyoung-Joon;Paik, Kyung-Wook
    • 마이크로전자및패키징학회지
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    • 제12권1호
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    • pp.9-16
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    • 2005
  • This paper presents the development of new anisotropic conductive adhesives with enhanced thermal conductivity for the wide use of adhesive flip chip technology with improved reliability under high current density condition. The continuing downscaling of structural profiles and increase in inter-connection density in flip chip packaging using ACAs has given rise to reliability problem under high current density. In detail, as the bump size is reduced, the current density through bump is also increased. This increased current density also causes new failure mechanism such as interface degradation due to inter-metallic compound formation and adhesive swelling due to high current stressing, especially in high current density interconnection, in which high junction temperature enhances such failure mechanism. Therefore, it is necessary for the ACA to become thermal transfer medium to improve the lifetime of ACA flip chip joint under high current stressing condition. We developed thermally conductive ACA of 0.63 W/m$\cdot$K thermal conductivity using the formulation incorporating $5 {\mu}m$ Ni and $0.2{\mu}m$ SiC-filled epoxy-bated binder system to achieve acceptable viscosity, curing property, and other thermo-mechanical properties such as low CTE and high modulus. The current carrying capability of ACA flip chip joints was improved up to 6.7 A by use of thermally conductive ACA compared to conventional ACA. Electrical reliability of thermally conductive ACA flip chip joint under current stressing condition was also improved showing stable electrical conductivity of flip chip joints. The high current carrying capability and improved electrical reliability of thermally conductive ACA flip chip joint under current stressing test is mainly due to the effective heat dissipation by thermally conductive adhesive around Au stud bumps/ACA/PCB pads structure.

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미세피치용 Cu/SnAg 더블 범프 플립칩 어셈블리의 신뢰성에 관한 연구 (Reliability Studies on Cu/SnAg Double-Bump Flip Chip Assemblies for Fine Pitch Applications)

  • 손호영;김일호;이순복;정기조;박병진;백경욱
    • 마이크로전자및패키징학회지
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    • 제15권2호
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    • pp.37-45
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    • 2008
  • 본 논문에서는 유기 기판 위에 $100{\mu}m$ 피치를 갖는 플립칩 구조인 Cu(60 um)/SnAg(20 um) 더블 범프 플립칩 어셈블리를 구현하여 이의 리플로우, 고온 유지 신뢰성, 열주기 신뢰성, Electromigration 신뢰성을 평가하였다. 먼저, 리플로우의 경우 횟수와 온도에 상관없이 범프 접속 저항의 변화는 거의 나타나지 않음을 알 수 있었다. 125도 고온 유지 시험에서는 2000시간까지 접속 저항 변화가 관찰되지 않았던 반면, 150도에서는 Kirkendall void의 형성으로 인한 접속 저항의 증가가 관찰되었다 또한 Electromigration 시험에서는 600시간까지 불량이 발생하지 않았는데 이는 Al금속 배선에서 유발되는 높은 전류 밀도가 Cu 칼럼의 높은 두께로 인해 솔더 영역에서는 낮아지기 때문으로 해석되었다. 열주기 시험의 경우, 400 cycle 이후부터 접속 저항의 증가가 발견되었으며, 이는 열주기 시험 동안 실리콘 칩과 Cu 칼럼 사이에 작용하는 압축 변형에 의해 그 사이에 있는 Al 및 Ti 층이 바깥쪽으로 밀려나감으로 인해 발생하는 것으로 확인되었다.

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FLIP CHIP SOLDER BUMPING PROCESS BY ELECTROLESS NI

  • Lee, Chang-Youl;Cho, Won-Jong;Jung, Seung-Boo;Shur, Chang-Chae
    • 대한용접접합학회:학술대회논문집
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    • 대한용접접합학회 2002년도 Proceedings of the International Welding/Joining Conference-Korea
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    • pp.456-462
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    • 2002
  • In the present work, a low cost and fine pitch bumping process by electroless Ni/immersion Au UBM (under bump metallurgy) and stencil printing for the solder bump on the Al pad is discussed. The Chip used this experimental had an array of pad 14x14 and zincate catalyst treatment is applied as the pretreatment of Al bond pad, it was shown that the second zincating process produced a dense continuous zincating layer compared to first zincating. Ni UBM was analyzed using Scanning electron microscopy, Energy dispersive x-ray, Atomic force microscopy, and X-ray diffractometer. The electroless Ni-P had amorphous structures in as-plated condition. and crystallized at 321 C to Ni and Ni$_3$P. Solder bumps are formed on without bridge or missing bump by stencil print solder bump process.

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FLIP CHIP ON ORGANIC BOARD TECHNOLOGY USING MODIFIED ANISOTROPIC CONDUCTIVE FILMS AND ELECTROLESS NICKEL/GOLD BUMP

  • Yim, Myung-Jin;Jeon, Young-Doo;Paik, Kyung-Wook
    • 마이크로전자및패키징학회지
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    • 제6권2호
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    • pp.13-21
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    • 1999
  • Flip chip assembly directly on organic boards offers miniaturization of package size as well as reduction in interconnection distances resulting in a high performance and cost-competitive Packaging method. This paper describes the investigation of alternative low cost flip-chip mounting processes using electroless Ni/Au bump and anisotropic conductive adhesives/films as an interconnection material on organic boards such as FR-4. As bumps for flip chip, electroless Ni/Au plating was performed and characterized in mechanical and metallurgical point of view. Effect of annealing on Ni bump characteristics informed that the formation of crystalline nickel with $Ni_3$P precipitation above $300^{\circ}C$ causes an increase of hardness and an increase of the intrinsic stress resulting in a reliability limitation. As an interconnection material, modified ACFs composed of nickel conductive fillers for electrical conductor and non-conductive inorganic fillers for modification of film properties such as coefficient of thermal expansion(CTE) and tensile strength were formulated for improved electrical and mechanical properties of ACF interconnection. The thermal fatigue life of ACA/F flip chip on organic board limited by the thermal expansion mismatch between the chip and the board could be increased by a modified ACA/F. Three ACF materials with different CTE values were prepared and bonded between Si chip and FR-4 board for the thermal strain measurement using moire interferometry. The thermal strain of ACF interconnection layer induced by temperature excursion of $80^{\circ}C$ was decreased with decreasing CTEs of ACF materials.

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