• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2002년도 춘계학술대회 논문집 센서 박막재료 반도체재료 기술교육
• /
• pp.39-42
• /
• 2002

There is a renewed interest in the application of photoconductors especially Cd(Zn)Te to x-ray imaging. In this paper, We investigate effects on x-ray detection characteristic of Zn dopped CdTe detector. Cd(Zn)Te film was fabricated by vacuum thermal evaporation method and then investigate physical analysis using EPMA and XRD. We investigated the leakage current and X-ray photosensitivity as applied voltage about fabricated Cd(Zn)Te film. Experimental results showed that the increase of Zn dopped concentration in $Cd_{1-x}Zn_{x}Te$ detector reduced a leakage current and improved a signal to noise ratio significantly.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2002년도 춘계학술대회 논문집 센서 박막재료 반도체재료 기술교육
• /
• pp.27-30
• /
• 2002

Photoconductor for direct detection flat-panel imager present a great materials challenge, since their requirements include high X -ray absorption, ionization and charge collection, low leakage current and large area deposition. Selenium is practical material. But it needs high thickness and high voltage in selenium for high ionization rate. We report comparative studies of detector sensitivity. One is an a-Se with $70{\mu}m$ thickness on glass. The other has hybrid layer of depositting ZnS phosphor with $100{\mu}m$ on a-Se. The leakage current of hybrid is similar to it of a-Se, but photocurrent is lager than a-Se. Both of them have high spatial resolution, but hybrid has higher sensitivity than a-Se at comparable bias voltage.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
• /
• pp.229-232
• /
• 2002

In this paper, etching characteristics of Zr-silicate in Ar/ClrCH4 plasma is studied, and possible plasma damage is investigated by fabricating MIS capacitors. We'could increase the selectivity to near 2 while keeping the etch rate of Zr-silicate to about 70 nm/min. Leakage current and flat band voltage shift of PUZr-silicate/si capacitors are measured before and after plasma etching. Using capacitor patterns with the same area but different circumference lengths, we try to separate etching damage mechanisms and to optimize the process. The leakage current of 1.2$\times$10-3 A/cm2 and smaller capacitance variation of 0.2 nF at -2V are obtained in Ar/Cl2/CF4 plasma at 200 W RF power

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2002년도 하계학술대회 논문집 C
• /
• pp.1473-1475
• /
• 2002

This study presents the dielectric properties of $Ta_2O_5$ MIM capacitor structure processed by thermal oxidation. The AES(auger electron emission) depth profile showed thermal oxidation effect gives rise to the $O_2$ deficiened into the new layer. The leakage current density respectively, at $1{\sim}3{\times}10^{-3}$(kV/cm) were $3{\times}10^{-4}-10^{-8}(A/cm^2)$. Leakage current density behavior is stable irrespective of applied electric field, the frequency va capacitance characteristic enhanced stability. The capacitance vs voltage measurement that, $V_{fb}$(flat-band voltage) was increase dependance on the thin films thickness, it is changed negative to positive.

• 전자공학회논문지A
• /
• 제30A권12호
• /
• pp.77-87
• /
• 1993

PMOSFETs were studied on the effect of Hot-Carrier induced drain leakage current (Gate-Induced-Drain-Leakage). The result turned out that change in Vgl(drain voltage where 1pA/$\mu$m of drain leadage current flows) was largest in the Channel-Hot-Hole(CHH) injection condition and next was in dynamic stress and was smallest in electron trapping (Igmax) condition under various stress conditions. It was analyzed that if electron trapping occurrs in the overlap region of gate and drain(G/D), it reduces GIDL current due to increment of flat-band voltage(Vfb) and if CHH is injected, interface states(Nit) were generated and it increases GIDL current due to band-to-defect-tunneling(BTDT). Especially, under dynamic stress it was confirmed that increase in GIDL current will be high when electron injection was small and CHH injection was large. Therefore as applying to real circuit, low drain voltage GIDL(BTDT) was enhaced as large as CHH Region under various operating voltage, and it will affect the reliablity of the circuit.

• 유체기계공업학회:학술대회논문집
• /
• 유체기계공업학회 2002년도 유체기계 연구개발 발표회 논문집
• /
• pp.465-470
• /
• 2002

For measuring friction-factor of artificially-roughened surfaces which are usually applied on damper seals, flat plate test apparatus is designed and fabricated. the measurement of leakage and pressure distribution through round-hole pattern specimen with different hole area is described and a method is discussed for determining the friction-factor experimentally. Results show that the friction-factor of the round-hole pattern surfaces is bigger than that of smooth surface and increases as increasing the hole area. A empirical friction factor model for round-hole pattern surface is defined as the Moody's friction factor formula.

• 한국유체기계학회 논문집
• /
• 제6권3호
• /
• pp.15-20
• /
• 2003

For measuring friction factor of artificially-roughened surfaces which are usually applied to damper seals, flat plate test apparatus is designed and fabricated. The measurements of leakage flow and pressure distribution through round-hole patterned specimen with different hole areas are described, and a method is discussed for determining the friction factor experimentally. Results show that the friction factor of the round-hole patterned surface is bigger than that of smooth surface, and increases as increasing the hole area. A empirical friction factor model for the round-hole patterned surface can be descrived by the Moody's friction factor formula.

• 한국전기전자재료학회논문지
• /
• 제21권12호
• /
• pp.1090-1095
• /
• 2008

The SiOCH films that low dielectric interlayer dielectric materials were deposited on p-type Si(100) substrates through the dissociation of BTMSM precursors with oxygen gas by using PECVD method. BTMSM precursor was introduced with the flow rates from 42 sccm to 60 sccm by 2 sccm step in the constant flow rate of 60 sccm $O_2$. SiOCH thin films were annealed at $450^{\circ}C$ for 30 minutes. The electrical property of SiOCH thin films was studied by MIS, Al/SiOCH/p-Si(100), structure. Annealed samples showed even greater reductions of the maximum capacitance and the dielectric constant of the SiOCH samples, owing to reductions of surface charge density. we confirmed this result with derivative of C-V characteristic, leakage current density. The maximum capacitance and leakage current density were respectively decreased about 4 pF, 60% after annealing. The average of low-k value is approximatly 2.07 after annealing.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제2권3호
• /
• pp.180-184
• /
• 2002

In this paper, the electrical properties of PVD Ta and $TaN_x$ gate electrodes on $SiO_2$ and their thermal stabilities are investigated. The results show that the work functions of $TaN_x$ gate electrode are modified by the amount of N, which is controlled by the flow rate of $N_2$during reactive sputtering process. The thermal stability of Ta and $TaN_x$ with RTO-grown $SiO_2$ gate dielectrics is examined by changes in equivalent oxide thickness (EOT), flat-band voltage ($V_{FB}$), and leakage current after post-metallization anneal at high temperature in $N_2$ambient. For a Ta gate electrode, the observed decrease in EOT and leakage current is due to the formation of a Ta-incorporated high-K layer during the high temperature annealing. Less change in EOT and leakage current is observed for $TaN_x$ gate electrode. It is also shown that the frequency dispersion and hysteresis of high frequency CV curves are improved significantly by a post-metallization anneal.

• 한국통신학회논문지
• /
• 제15권3호
• /
• pp.252-259
• /
• 1990

本 論文은 기존 LOCOS工程의 張點을 모두 겸비한 側面璧 SWAMI 技術에 대한 새로운 構造를 提示한다. 새로운 SWAMI공정은 순수 窒化膜 壓力과 體積 膨腸에 기인한 壓力을 크게 줄이기 위해서 側面璧 주위에 얇은 질화막과 反應性이온 飾刻으로 기울어진 실리콘 측면벽을 結合시켰따. 製作된 結果에 의하면, 缺陷이 없는 완전히 새부리 모양이 形成되지 않는 局地的 酸化 공정은 기울어진 面의 異方性 산화 隔離에 의해 實現시킬 수 있었다. 추가적인 마스크 段階는 要求되지 않는다. 이 工程에서 PN 다이오드의 漏泄電流는 기존 LOCOS 공정 보다 減少되었다. 한편 가장자리 部位는 漏泄電流 密度에서 평편한 接合 부위 보다 높게 分析되었다.