• The KIPS Transactions:PartA
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• v.14A no.4
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• pp.235-244
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• 2007

Caching and prefetching policies have been used in most of computer systems to compensate speed differences between primary memory and secondary storage devices. In this paper, we design and implement a Flash Cache Core Module(FCCM) on the YAFFS which operates on a file system layer for NAND flash memory. The FCCM is independent of the underlying kernel in order to support its stability and compatibility. Also, we implement the Dirty-Last memory replacement technique considering the characteristics of flash memory, and the waiting queue for pages to be prefetched according to page hit. The FCCM reduced the number of I/Os and the amount of prefetched pages by maximum 55%(20% on average) and maximum 55%(24% on average), respectively, comparing with caching and prefetching policies of Linux.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.8
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• pp.1962-1969
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• 2009

During past 20 years we have witnessed brilliant advances in major components of computer system, including CPU, memory, network device and HDD. Among these components, in spite of its tremendous advance in capacity, the HDD is the most performance dragging device until now and there is little affirmative forecasting that this problem will be resolved in the near future. We present a new approach to solve this problem using the NAND Flash memory. Researches utilizing Flash memory as storage medium are abundant these days, but almost all of them are targeted to mobile or embedded devices. Our research aims to develop the NAND Flash memory based storage system enough even for enterprise level server systems. This paper present structural and operational mechanism to overcome the weaknesses of existing NAND Flash memory based storage system, and its evaluation.

• Journal of KIISE:Computing Practices and Letters
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• v.11 no.4
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• pp.368-380
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• 2005

File systems for flash memory that is widely used as a storage device for mobile devices should provide not only high-performance data reads and writes but also a guarantee on the data integrity even on a power failure. In this paper, we explain the design and implementation of a file system for flash memory that considers flash memory's physical characteristics and the data layout in the file system to give an optimized write performance. This file system guarantees the reliability against various system failures including a power failure by using the transaction concept in write processing. In addition, the file system minimizes the memory usage by using a simple static mapping. In the paper, we also describe the implementation of the file system and compare its performance with other existing flash memory ille systems.

• Journal of Internet of Things and Convergence
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• v.7 no.4
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• pp.9-14
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• 2021

In computing systems that require high reliability, the method of predicting the lifetime of a storage device is one of the important factors for system management because it can maximize usability as well as data protection. The life of a solid state drive (SSD) that has recently been used as a storage device in several storage systems is linked to the life of the NAND flash memory that constitutes it. Therefore, in a storage system configured using an SSD, a method of accurately and efficiently predicting the lifespan of a NAND flash memory is required. In this paper, a method for optimizing the lifetime prediction of a flash memory-based storage device using the frequency of NAND flash memory failure is proposed. For this, we design a cost matrix to collect the frequency of defects that occur when processing data in units of Drive Writes Per Day (DWPD). In addition, a method of predicting the remaining cost to the slope where the life-long finish occurs using the Gradient Descent method is proposed. Finally, we proved the excellence of the proposed idea when any defect occurs with simulation.

• Journal of the Korea Society of Computer and Information
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• v.14 no.6
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• pp.1-10
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• 2009

Flash memory has the advantages of nonvolatile, low power consumption, light weight, and high endurance. This enables the flash memory to be utilized as a storage of mobile computing device such as PMP(Portable Multimedia Player). Potable device with a mass flash memory can store various multimedia data such as video, audio, or image. Typical index systems for mobile computer are inefficient to search a form of text like lyric or title. In this paper, we propose a new text index system, named EMTEX(Embedded Text Index). EMTEX has the following salient features. First, it uses a compression algorithm for embedded system. Second, if a new insert or delete operation is executed on the base table. EMTEX updates the text index immediately. Third, EMTEX considers the characteristics of flash memory to design insert, delete, and rebuild operations on the text index. Finally, EMTEX is executed as an upper layer of DBMS. Therefore, it is independent of the underlying DBMS. We evaluate the performance of EMTEX. The Experiment results show that EMTEX can outperform th conventional index systems such as Oracle Text and FT3.

• The Journal of the Korea Contents Association
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• v.5 no.4
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• pp.180-187
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• 2005

In this paper, we developed an online lecture for digital logic circuit which is a basic course in electric/electronic education. Because of importance of the laboratory experiences in this course and to reflect industrial requests, we have selected most effective experimental examples in each chapter and inserted instructions for basic usags of ORCAD and digial clock design. Moreover, we developed cyber lab to design students' own circuit using Flash animation. Two features of this cyber lab are real-like graphics for devices and breadboards to improve reality and patented new IC chip objects for easy experiments, which help the students understand digital logic easily.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.1
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• pp.59-63
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• 2015

This paper presents a 10-bit 10 MS/s Time-Interleaved Flash-SAR ADC with a shared Multiplying DAC. Using shared MDAC, the total capacitance in the SAR ADC decreased by 93.75%. The proposed ADC consumed 2.28mW under a 1.2V supply and achieved 9.679 bit ENOB performance. The ADC was implemented in $0.13{\mu}m$ CMOS technology. The chip area was $760{\times}280{\mu}m^2$.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2003.10a
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• pp.255-258
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• 2003

In this study, to develop a flash-less die for forming of shoe-outsole, experiments and forming analysis were carried out. In order to reduce the extra-materials, of feet method and mass distribution method are used in the preform design. To improve the accuracy of contact surface of dies, the contact status of dies are measured by using the pressure film. The vertical pressing die structure and the guide-gutter system have been developed for the discharge of extra-materials and re-pressing. By the investigation, flash of shoe-outsole was considerably reduced.

• Proceedings of the Korean Information Science Society Conference
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• 2011.06b
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• pp.458-461
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• 2011

모바일 디바이스 저장 장치로 많이 사용되고 있는 플래시 메모리는 가벼운 무게, 내구성, 낮은 전력 소비 등의 장점을 가지고 사용되기 시작하였으며 근래에는 모바일 뿐 아니라 다양한 멀티 미디어 디바이스 전반의 많은 제품에 채용되어 더욱 더 그 범위가 확산되는 추세에 있다. 플래시 메모리는 위에서 언급한 많은 장점이 있지만 기존에 사용되던 디스크와 달리 플래시 메모리 블록을 재사용하기 위해서는 삭제 후 쓰기라는 별도의 연산을 필요로 한다. 이를 FTL (Flash Translation Layer) 이라는 S/W 모듈을 통해 구현되어 있으며 FTL의 구현 알고리즘에 따라 소용되는 연산 비용 또한 상이하며 그 특성과 성능이 매우 다양하게 나타난다. 일반적으로 리눅스에서 FTL은 커널 내부에 구현되어 디바이스 드라이버 형태로 존재하며 일반적인 S/W 개발자보다는 플래시 및 커널 관련 전문지식을 가진 시스템 개발자가 구현을 하게 된다. 이 논문에서는 커널 및 시스템에 대한 깊은 지식 없이도 새롭게 고안된 FTL 알고리즘을 쉽고 빠르게 구현, 검증할 수 있도록 커널이 아닌 사용자 공간에 FTL을 구현하여 빠른 시간 내에 착안된 알고리즘을 실험, 검증할 수 있는 UFTL(User Space Flash Translation Layer) 개발 플랫폼올 제안한다.

• Journal of the Korean Society of Safety
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• v.24 no.5
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• pp.28-33
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• 2009

The thermochemical parameters for safe handling, storage, transport, operation and process design of flammable substances are explosion limit, flash point, autoignition temperatures(AITs), minimum oxygen concentration(MOC), heat of combustion etc.. Also it is necessary to know explosion limit at high temperature and pressure. For the safe handling of benzene, lower explosion limit(LEL) at $25^{\circ}C$, the temperature dependence of the explosion limits and flash point were investigated. And the AITs for benzene were experimented. By using the literatures data, the lower and upper explosion limits of benzene recommended 1.3 vol% and 8.0 vol%, respectively. This study measured relationship between the AITs and the ignition delay times by using ASTM E659-78 apparatus for benzene, and the experimental AIT of benzene was $583^{\circ}C$. The new equations for predicting the temperature dependence of the explosion limits of benzene is proposed. The values calculated by the proposed equations were a good agreement with the literature data.