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http://dx.doi.org/10.5573/IEIESPC.2015.4.1.059

Design of 10-bit 10MS/s Time-Interleaved Flash-SAR ADC Using Sharable MDAC  

Do, Sung-Han (Sungkyunkwan University)
Oh, Seong-Jin (Sungkyunkwan University)
Seo, Dong-Hyeon (Sungkyunkwan University)
Lee, Juri (Sungkyunkwan University)
Lee, Kang-Yoon (Sungkyunkwan University)
Publication Information
IEIE Transactions on Smart Processing and Computing / v.4, no.1, 2015 , pp. 59-63 More about this Journal
Abstract
This paper presents a 10-bit 10 MS/s Time-Interleaved Flash-SAR ADC with a shared Multiplying DAC. Using shared MDAC, the total capacitance in the SAR ADC decreased by 93.75%. The proposed ADC consumed 2.28mW under a 1.2V supply and achieved 9.679 bit ENOB performance. The ADC was implemented in $0.13{\mu}m$ CMOS technology. The chip area was $760{\times}280{\mu}m^2$.
Keywords
Time-Interleaved; Flash-SAR ADC; Multiplying DAC;
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