• Title/Summary/Keyword: Fixed-point computations

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Automatic Floating-Point to Fixed-Point Conversion for Speech Recognition in Embedded Device (임베디드 디바이스에서 음성 인식 알고리듬 구현을 위한 부동 소수점 연산의 고정 소수점 연산 변환 기법)

  • Yun, Sung-Rack;Yoo, Chang-D.
    • Proceedings of the IEEK Conference
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    • 2007.07a
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    • pp.305-306
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    • 2007
  • This paper proposes an automatic conversion method from floating-point value computations to fixed-point value computations for implementing automatic speech recognition (ASR) algorithms in embedded device.

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Dynamic Free-Surface Deformations in Axisymmetric Thermocapillary Convection in Open Cylindrical Annuli (동적인 자유표면을 가진 동심원통에서의 열모세관 대류)

  • Sim, Bok-Cheol;Kim, Woo-Seung
    • Proceedings of the KSME Conference
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    • 2003.04a
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    • pp.1560-1565
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    • 2003
  • Thermocapillary convection in an open cylindrical annulus heated from the inside wall is investigated by two-dimensional numerical simulations. The deformable free surface is obtained as a solution of the coupled transport equations at fixed Prandtl and aspect ratio. Only steady convection can be realized in this axisymmetric computations with either non-deformable or deformable surfaces. Dynamic free-surface deformations do not induce transitions to oscillatory convection even at large Reynolds numbers. Free surfaces are convex near the cold wall due to the stagnation point, and concave near the hot wall. Free surface deformation increases with increasing Ca at a fixed Re. Two peaks appear at the free surface with low Re, while additional ripples, four peaks, occur at larger Re. Thermocapillary convection in the open annulus interior is insensitive to variations in Ca.

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An Implementation of Real-time Image Warping Using FPGA (FPGA를 이용한 실시간 영상 워핑 구현)

  • Ryoo, Jung Rae;Lee, Eun Sang;Doh, Tae-Yong
    • IEMEK Journal of Embedded Systems and Applications
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    • v.9 no.6
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    • pp.335-344
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    • 2014
  • As a kind of 2D spatial coordinate transform, image warping is a basic image processing technique utilized in various applications. Though image warping algorithm is composed of relatively simple operations such as memory accesses and computations of weighted average, real-time implementations on embedded vision systems suffer from limited computational power because the simple operations are iterated as many times as the number of pixels. This paper presents a real-time implementation of a look-up table(LUT)-based image warping using an FPGA. In order to ensure sufficient data transfer rate from memories storing mapping LUT and image data, appropriate memory devices are selected by analyzing memory access patterns in an LUT-based image warping using backward mapping. In addition, hardware structure of a parallel and pipelined architecture is proposed for fast computation of bilinear interpolation using fixed-point operations. Accuracy of the implemented hardware is verified using a synthesized test image, and an application to real-time lens distortion correction is exemplified.

A Real-Time JPEG2000 Codec Implementation on ARM9 Processor (ARM9 프로세서용 실시간 JPEG2000 코덱의 구현)

  • Kim, Young-Tae;Cho, Shi-Won;Lee, Dong-Wook
    • Journal of the Institute of Convergence Signal Processing
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    • v.8 no.3
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    • pp.149-155
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    • 2007
  • In this paper, we propose an real-time implementation of JPEG2000 codec on the ARM9 processor. The implemented codec is designed to separate control codes from data management codes in order to use effectively the system resources such as processor and memory. Especially, in embedded situations like cellular phones it is very important to provide good services using limited processor and internal memory. Since ARM9 series processors do not provide floating-point, large amount of computational time is required to perform the operation which needs highly repetitive floating-point computations like DWT(discrete wavelet transform). The proposed codec was programed using fixed-point to overcome this weakness. Also code optimization considering cache memory was applied to further improve the computational speed.

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Numerical Study on Transition Characteristics of Dual Bell Nozzle with Expansion Ratio Fixed (팽창비가 고정된 듀얼 벨 노즐의 천이특성에 대한 수치해석 연구)

  • Choi, Junsub;Huh, Hwanil
    • Journal of the Korean Society of Propulsion Engineers
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    • v.21 no.3
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    • pp.68-75
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    • 2017
  • Dual bell nozzle is a type of altitude compensation nozzle, which is a nozzle that minimize the losses of the specific impulse at the off-design point of a typical bell nozzle. In this paper, numerical computations are performed to understand the transition characteristics of dual bell nozzles with fixed expansion ratios. The major design variables are the length of extension and the angle of inflection. As the length of the extension increased, the transition altitude and transition duration increased and the reduction of the thrust coefficient decreased. As the angle of inflection increased, the transition altitude and transition duration decreased and the reduction of the thrust coefficient increased.

Performance Analysis of Error Correction Codes for 3GPP Standard (3GPP 규격 오류 정정 부호 기법의 성능 평가)

  • 신나나;이창우
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.15 no.1
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    • pp.81-88
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    • 2004
  • Turbo code has been adopted in the 3GPP standard, since its performance is very close to the Shannon limit. However, the turbo decoder requires a lot of computations and the amount of the memory increases as the block size of turbo codes becomes larger. In order to reduce the complexity of the turbo decoder, the Log-MAP, the Max-Log-MAP and the sliding window algorithm have been proposed. In this paper, the performance of turbo codes adopted in the 3GPP standard is analyzed by using the floating point and the fixed point implementation. The efficient decoding method is also proposed. It is shown that the BER performance of the proposed method is close to that of the Log-MAP algorithm.

A Fast Background Subtraction Method Robust to High Traffic and Rapid Illumination Changes (많은 통행량과 조명 변화에 강인한 빠른 배경 모델링 방법)

  • Lee, Gwang-Gook;Kim, Jae-Jun;Kim, Whoi-Yul
    • Journal of Korea Multimedia Society
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    • v.13 no.3
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    • pp.417-429
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    • 2010
  • Though background subtraction has been widely studied for last decades, it is still a poorly solved problem especially when it meets real environments. In this paper, we first address some common problems for background subtraction that occur in real environments and then those problems are resolved by improving an existing GMM-based background modeling method. First, to achieve low computations, fixed point operations are used. Because background model usually does not require high precision of variables, we can reduce the computation time while maintaining its accuracy by adopting fixed point operations rather than floating point operations. Secondly, to avoid erroneous backgrounds that are induced by high pedestrian traffic, static levels of pixels are examined using shot-time statistics of pixel history. By using a lower learning rate for non-static pixels, we can preserve valid backgrounds even for busy scenes where foregrounds dominate. Finally, to adapt rapid illumination changes, we estimated the intensity change between two consecutive frames as a linear transform and compensated learned background models according to the estimated transform. By applying the fixed point operation to existing GMM-based method, it was able to reduce the computation time to about 30% of the original processing time. Also, experiments on a real video with high pedestrian traffic showed that our proposed method improves the previous background modeling methods by 20% in detection rate and 5~10% in false alarm rate.

Study of the semi-segregation algorithms of the incompressible Navier-Stokes equations using P2P1 finite element formulation (P2P1 유한요소 공식을 이용한 비압축성 Navier-Stokes 방정식의 반-분리 해법에 관한 연구)

  • Cho, Myung-H.;Choi, Hyoung-G.;Yoo, Jung-Y.;Park, Jae-I.
    • 유체기계공업학회:학술대회논문집
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    • 2006.08a
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    • pp.349-352
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    • 2006
  • The conventional segregated finite element formulation produces a small and simple matrix at each step than in an integrated formulation. And the memory and cost requirements of computations are significantly reduced because the pressure equation for the mass conservation of the Navier-Stokes equations is constructed only once if the mesh is fixed. However, segregated finite element formulation solves Poisson equation of elliptic type so that it always needs a pressure boundary condition along a boundary even when physical information on pressure is not provided. On the other hand, the conventional integrated finite element formulation in which the governing equations are simultaneously treated has an advantage over a segregated formulation in the sense that it can give a more robust convergence behavior because all variables are implicitly combined. Further it needs a very small number of iterations to achieve convergence. However, the saddle-paint-type matrix (SPTM) in the integrated formulation is assembled and preconditioned every time step, so that it needs a large memory and computing time. Therefore, we newly proposed the P2PI semi-segregation formulation. In order to utilize the fact that the pressure equation is assembled and preconditioned only once in the segregated finite element formulation, a fixed symmetric SPTM has been obtained for the continuity constraint of the present semi-segregation finite element formulation. The momentum equation in the semi-segregation finite element formulation will be separated from the continuity equation so that the saddle-point-type matrix is assembled and preconditioned only once during the whole computation as long as the mesh does not change. For a comparison of the CPU time, accuracy and condition number between the two methods, they have been applied to the well-known benchmark problem. It is shown that the newly proposed semi-segregation finite element formulation performs better than the conventional integrated finite element formulation in terms of the computation time.

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Generation of Progressively Sampled DTM using Model Key Points Extracted from Contours in Digital Vector Maps (수치지도 등고선의 Model Key Point 추출과 Progressive Sampling에 의한 수치지형모델 생성)

  • Lee, Sun-Geun;Yom, Jae-Hong;Lim, Sae-Bom;Kim, Kye-Lim;Lee, Dong-Cheon
    • Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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    • v.25 no.6_2
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    • pp.645-651
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    • 2007
  • In general, contours in digital vector maps, which represent terrain characteristics and shape, are created by 3D digitizing the same height points using aerial photographs on the analytical or digital plotters with stereoscopic viewing. Hence, it requires lots of task, and subjective decision and experience of the operators. DTMs are generated indirectly by using contours since the national digital maps do not include digital terrain model (DTM) data. In this study, model key points which depict the important information about terrain characteristics were extracted from the contours. Further, determination of the efficient and flexible grid sizes were proposed to generate optimal DTM in terms of both quantitative and qualitative aspects. For this purpose, a progressive sampling technique was implemented, i.e., the smaller grid sizes are assigned for the mountainous areas where have large relief while the larger grid sizes are assigned for the relatively flat areas. In consequence, DTMs with multi-grid for difference areas could be generated instead of DTMs with a fixed grid size. The multi-grid DTMs reduce computations for data processing and provide fast display.

The viterbi decoder implementation with efficient structure for real-time Coded Orthogonal Frequency Division Multiplexing (실시간 COFDM시스템을 위한 효율적인 구조를 갖는 비터비 디코더 설계)

  • Hwang Jong-Hee;Lee Seung-Yerl;Kim Dong-Sun;Chung Duck-Jin
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.2 s.332
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    • pp.61-74
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    • 2005
  • Digital Multimedia Broadcasting(DMB) is a reliable multi-service system for reception by mobile and portable receivers. DMB system allows interference-free reception under the conditions of multipath propagation and transmission errors using COFDM modulation scheme, simultaneously, needs powerful channel error's correction ability. Viterbi Decoder for DMB receiver uses punctured convolutional code and needs lots of computations for real-time operation. So, it is desired to design a high speed and low-power hardware scheme for Viterbi decoder. This paper proposes a combined add-compare-select(ACS) and path metric normalization(PMN) unit for computation power. The proposed PMN architecture reduces the problem of the critical path by applying fixed value for selection algorithm due to the comparison tree which has a weak point from structure with the high-speed operation. The proposed ACS uses the decomposition and the pre-computation technique for reducing the complicated degree of the adder, the comparator and multiplexer. According to a simulation result, reduction of area $3.78\%$, power consumption $12.22\%$, maximum gate delay $23.80\%$ occurred from punctured viterbi decoder for DMB system.