• Title/Summary/Keyword: Finite Automata

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Continuity of directional entropy for a class of $Z^2$-actions

  • Park, Kyewon-K.
    • Journal of the Korean Mathematical Society
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    • v.32 no.3
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    • pp.573-582
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    • 1995
  • J.Milnor[Mi2] has introduced the notion of directional entropy in his study of Cellular Automata. Cellular Automaton map can be considered as a continuous map from a space $K^Z^n$ to itself which commute with the translation of the lattice $Z^n$. Since the space $K^Z^n$ is compact, map S is uniformly continuous. Hence S is a block map(a finite code)[He]. (S is said to have a finite memory.) In the case of n = 1, we have a shift map, T on $K^Z$, and a block map S and they together generate a $Z^2$ action.

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Video Browsing System using Finite Automata (유한 오토마타를 이용한 비디오 브라우징 시스템)

  • 서명필;김기원;이팔진
    • Proceedings of the Korea Multimedia Society Conference
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    • 2000.04a
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    • pp.273-276
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    • 2000
  • 본 논문에서는 문서처리와 비디오 스트림 처리에 이용되는 이론적 배경을 고찰하고 , 제시된 이론을 바탕으로 하나의 비디오 스트림을 결정적 유한 오토마타 형태의 논리적인 구조로 재구성하여 사용자의 요구나 수준에 따라 가변적인 재생 시간을 갖는 비디오 브라우징 시스템을 구현하였다.

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Code Optimization Using Pattern Table (패턴 테이블을 이용한 코드 최적화)

  • Yun Sung-Lim;Oh Se-Man
    • Journal of Korea Multimedia Society
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    • v.8 no.11
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    • pp.1556-1564
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    • 2005
  • Various optimization techniques are deployed in the compilation process of a source program for improving the program's execution speed and reducing the size of the source code. Of the optimization pattern matching techniques, the string pattern matching technique involves finding an optimal pattern that corresponds to the intermediate code. However, it is deemed inefficient due to excessive time required for optimized pattern search. The tree matching pattern technique can result in many redundant comparisons for pattern determination, and there is also the disadvantage of high cost involved in constructing a code tree. The objective of this paper is to propose a table-driven code optimizer using the DFA(Deterministic Finite Automata) optimization table to overcome the shortcomings of existing optimization techniques. Unlike other techniques, this is an efficient method of implementing an optimizer that is constructed with the deterministic automata, which determines the final pattern, refuting the pattern selection cost and expediting the pattern search process.

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Analysis of Shrunken Sequences using LFSR and CA on GF(2p) (GF(2p) 위에서의 LFSR과 CA를 이용한 shrunken 수열의 분석)

  • Choi, Un-Sook;Cho, Sung-Jin;Kim, Jin-Gyoung
    • The Journal of the Korea institute of electronic communication sciences
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    • v.5 no.4
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    • pp.418-424
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    • 2010
  • Many researchers studied methods for the generation of maximum length pseudo random sequences. Sabater et al. analyzed shrunken sequences which are effectively generated by SG(Shrinking Generator) using CA(Cellular Automata). In this paper we propose a new SG which is called LCSG(LFSR and CA based Shrinking Generator) using an LFSR with control register and CA with generator register. The proposed shrunken sequences generated by LCSG have longer periods and high complexities than the shrunken sequences generated by the known method. And we analyze the generated sequences using LCSG.

A New Digital Image Steganography Approach Based on The Galois Field GF(pm) Using Graph and Automata

  • Nguyen, Huy Truong
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.13 no.9
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    • pp.4788-4813
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    • 2019
  • In this paper, we introduce concepts of optimal and near optimal secret data hiding schemes. We present a new digital image steganography approach based on the Galois field $GF(p^m)$ using graph and automata to design the data hiding scheme of the general form ($k,N,{\lfloor}{\log}_2p^{mn}{\rfloor}$) for binary, gray and palette images with the given assumptions, where k, m, n, N are positive integers and p is prime, show the sufficient conditions for the existence and prove the existence of some optimal and near optimal secret data hiding schemes. These results are derived from the concept of the maximal secret data ratio of embedded bits, the module approach and the fastest optimal parity assignment method proposed by Huy et al. in 2011 and 2013. An application of the schemes to the process of hiding a finite sequence of secret data in an image is also considered. Security analyses and experimental results confirm that our approach can create steganographic schemes which achieve high efficiency in embedding capacity, visual quality, speed as well as security, which are key properties of steganography.

Modeling and Simulation of Emergent Evacuation Using Affordance-based FSA Models (어포던스 기반 FSA모델을 이용한 대피자 행동 모델링 및 시뮬레이션)

  • Joo, Jae-Koo;Kim, Nam-Hun
    • Journal of Korean Institute of Industrial Engineers
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    • v.37 no.2
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    • pp.96-104
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    • 2011
  • Modeling and simulation of human-involved complex systems pose challenges to representing human decision makings into logical systems because of the nondeterministic and dynamic nature of human behaviors. In modeling perspectives, human's activities in systems can increase uncertainty and complexity, because he or she can potentially access all other resources within the system and change the system states. To address all of these human involvements in the system, this research suggests applying the Finite State Automata (FSA)-based formal modeling of human-involved systems that incorporates the ecological concept of affordances to an evacuation simulation, so that human behavioral patterns under urgent and dynamic emergency situations can be considered in the real-time simulation. The proposed simulation methodologies were interpreted using the warehouse fire evacuation simulation to clarify the applicability of the proposed methodology. This research is expected to merge system engineering technologies and human factors, and come out to the new predictive modeling methodology for disaster simulations. This research can be applied to a variety of applications such as building layout designs and building access control systems for emergency situations.

Code Optimization Using DFA (DFA 를 이용한 코드 최적화)

  • Yun, Sung-Lim;Oh, Se-Man
    • Proceedings of the Korea Information Processing Society Conference
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    • 2005.05a
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    • pp.525-528
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    • 2005
  • 원시 프로그램에 대한 컴파일 과정 중 최적화 단계에서는 프로그램의 실행 속도를 개선시키고 코드 크기를 줄일 수 있는 다양한 최적화 기법을 수행한다. 특히, 핍홀 ��적화는 비효율적인 명령어의 순서를 구별해 내고 연속되는 명령어의 순서를 의미적으로 동등하면서 좀 더 효율적인 코드로 개선하는 방법이다. 최적화 패턴 매칭 방법 중 스트링 패턴 매칭 방법은 중간 코드에 대응하는 최적의 패턴을 찾기 위한 방법으로 과다한 최적화 패턴 검색 시간으로 비효율적이고, 트리 패턴 매칭은 패턴 결정시 중복 비교가 발생할 수 있으며, 코드의 트리 구성에 많은 비용이 드는 단점을 가지고 있는 방법들이다. 본 논문에서는 기존의 최적화 방법들의 단점을 극복하기 위한 방법으로 DFA(Deterministic Finite Automata)를 이용한 코드 최적화 방법을 제안한다. 이 방법은 다른 패턴 매칭 기법보다 오토마타(Automata)로 구성하기 때문에 비용은 적어지고, 오토마타를 통해 결정적으로 패턴이 확정됨에 따른 패턴 선택 비용이 줄어들며, 최적화 패턴 검색 시간도 빨라지는 효율적인 방법이다.

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New Multiplier using Montgomery Algorithm over Finite Fields (유한필드상에서 몽고메리 알고리즘을 이용한 곱셈기 설계)

  • 하경주;이창순
    • Proceedings of the Korea Society for Industrial Systems Conference
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    • 2002.06a
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    • pp.190-194
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    • 2002
  • Multiplication in Galois Field GF(2/sup m/) is a primary operation for many applications, particularly for public key cryptography such as Diffie-Hellman key exchange, ElGamal. The current paper presents a new architecture that can process Montgomery multiplication over GF(2/sup m/) in m clock cycles based on cellular automata. It is possible to implement the modular exponentiation, division, inversion /sup 1)/architecture, etc. efficiently based on the Montgomery multiplication proposed in this paper. Since cellular automata architecture is simple, regular, modular and cascadable, it can be utilized efficiently for the implementation of VLSI.

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A Study on Verification of Rail Signal Control Protocol specified in I/O FSM (I/O FSM으로 명세화된 철도 신호제어용 프로토콜 검정에 관한 연구)

  • Seo Mi-Seon;Hwang Jong-Gyu;Lee Jae-Ho;Kim Sung-Un
    • Proceedings of the KSR Conference
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    • 2004.10a
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    • pp.1241-1246
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    • 2004
  • The verification confirms a correspondence between requirements and a specification before implementing. The problem in the formal method verifying a protocol specification using model checking is that the protocol behaviors must be always specified in L TS(Label Transition System). But if Region Automata is applied to the model checking, it is enable to verify whether properties are true on specification specified in I/O FSM(Input/Output Finite State Machine) as well as LTS. In this paper, we verify the correctness of rail signal control protocol type 1 specified in I/O FSM by using model checking method and region automata. This removes many errors and ambiguities of an informal method used in the past and saves down expenditures and times required in the protocol development. Therefore it is expected that there will be an increase in safety, reliability and efficiency in terms of the maintenance of the signaling system by using the proposed verification methods.

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