A Study on Verification of Rail Signal Control Protocol specified in I/O FSM

I/O FSM으로 명세화된 철도 신호제어용 프로토콜 검정에 관한 연구

The verification confirms a correspondence between requirements and a specification before implementing. The problem in the formal method verifying a protocol specification using model checking is that the protocol behaviors must be always specified in L TS(Label Transition System). But if Region Automata is applied to the model checking, it is enable to verify whether properties are true on specification specified in I/O FSM(Input/Output Finite State Machine) as well as LTS. In this paper, we verify the correctness of rail signal control protocol type 1 specified in I/O FSM by using model checking method and region automata. This removes many errors and ambiguities of an informal method used in the past and saves down expenditures and times required in the protocol development. Therefore it is expected that there will be an increase in safety, reliability and efficiency in terms of the maintenance of the signaling system by using the proposed verification methods.