• Korean Journal of Food Science and Technology
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• v.37 no.4
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• pp.567-573
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• 2005

Compatability of films made of chitosan, gelatin, and their blends prepared by aqueous solution casting was investigated using a thermogravimetric analyzer(TGA) and a dynamic mechanical analyzer (DMA). TGA showed gelatin is more thermally stable than chitosan, and thermal stability of chitosan in blends was higher than that of pure chitosan due to interaction among functional groups of component polymers in blend. Glass transition temperature $(T_g)$ of blends was dependent on chitosan content of blends. Blend films exhibited good miscibility. Moisture and glycerol contents of blend strongly affected thermal properties of two component polymers.

• Korean Journal of Materials Research
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• v.11 no.3
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• pp.215-220
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• 2001

Amorphous Ti-Si-N films of approximately 200 and 650 thickness were reactively sputtered on Si wafers using a dc magnetron sputtering system at various $N_2$/Ar flow ratios. Their barrier properties between Cu (750 ) and Si were investigated by using sheet resistance measurements, XRD, SEM, RBS, and AES depth profiling focused on the effect of the nitrogen content in Ti-Si-N thin film on the Ti-Si-N barrier properties. As the nitrogen content increases, first the failure temperature tends to increase up to 46 % and then decrease. Barrier failure seems to occur by the diffusion of Cu into the Si substrate to form Cu$_3$Si, since no other X- ray diffraction intensity peak (for example, that for titanium silicide) than Cu and Cu$_3$Si Peaks appears up to 80$0^{\circ}C$. The optimal composition of Ti-Si-N in this study is $Ti_{29}$Si$_{25}$N$_{46}$. The failure temperatures of the $Ti_{29}$Si$_{25}$N$_{465}$ barrier layers 200 and 650 thick are 650 and $700^{\circ}C$, respectively.ely.

• Korean Journal of Materials Research
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• v.10 no.4
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• pp.282-289
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• 2000

$PbTiO_3$ films were fabricated by electron cyclotron resonance plasma enhanced chemical vapor deposition(ECR-PECVD). Deposition characteristics of $PbTiO_3$films on $RuO_2$ and Pt substrates were investigated with varying the flow rate of metalorganic source and substrate temperature. The residence time of Pb-oxide molecules in much longer on $RuO_2$ than on Pt substrate, while the perovskite nucleation is more difficult on $RuO_2$ than on Pt substrate. Therefore, the process conditions to obtain the single perovskite $PbTiO_3$ phase are more restricted on $RuO_2$ than on Pt substrates. An introduction of Ti-oxide seed layer increases perovskite nucleation density and thus enlarges the process window to obtain the single perovkite phase. The introduction of Ti-oxide seed layer make the PZT film that Ti-components of $PbTiO_3$ are partially substituted with Zr atoms have single perovskite phase for the wide range of Zr/(Zr+Ti) concentration ratios.

• Korean Journal of Materials Research
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• v.8 no.10
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• pp.890-897
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• 1998

The direct wafer bonding between n-InP(001) wafer and the ${Si}_3N_4$(200 nm) film grown on the InP wafer by PECVD method was investigated. The surface states of InP wafer and ${Si}_3N_4$/InP which strongly depend upon the direct wafer bonding strength between them when they are brought into contact, were characterized by the contact angle measurement technique and atomic force microscopy. When InP wafer was etched by $50{\%}$ HF, contact angle was $5^{\circ}$ and RMS roughness was $1.54{\AA}$. When ${Si}_3N_4$ was etched by ammonia solution, RMS roughness was $3.11{\AA}$. The considerable amount of initial bonding strength between InP wafer and ${Si}_3N_4$/InP was observed when the two wafer was contacted after the etching process by $50{\%}$ HF and ammonia solution respectively. The bonded specimen was heat treated in $H^2$ or $N^2$, ambient at the temperature of $580^{\circ}C$-$680^{\circ}C$ for lhr. The bonding state was confirmed by SAT(Scannig Acoustic Tomography). The bonding strength was measured by shear force measurement of ${Si}_3N_4$/InP to InP wafer increased up to the same level of PECVD interface. The direct wafer bonding interface and ${Si}_3N_4$/InP PECVD interface were chracterized by TEM and AES.

• Journal of the Microelectronics and Packaging Society
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• v.6 no.2
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• pp.37-43
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• 1999

Modules of the system that requires large capacity and high-speed information processing are implemented in the form of MCM that allows high-speed data processing, high density circuit integration and widely applied to such fields as ATM, GPS and PCS. Hence we developed the ATM switching module that is consisted of three chips and 2.48 Gbps data throughput, in the form of 10 multi-layer by Cu/Photo-BCB and 491pin PBGA which size is $48 \times 48 \textrm {mm}^2$. hnologies required for the development of the MCM includes extracting parameters for designing the substrate/package through the interconnect characterization to implement the high-speed characteristics, thermal management at the high-density MCM, and the generation of the testability that is one of the most difficult issues for developing the MCM. For the development of the ATM Switching MCM, we extracted signaling delay, via characteristics and crosstalk parameters through the interconnect characterization on the MCM-D. For the thermal management of 15.6 Watt under the high-density structure, we carried out the thermal analysis. formed 1.108 thermal vias through the substrate, and performed heat-proofing processing for the entire package so that it can keep the temperature less than $85^{\circ}C$. Lastly, in order to ensure the testability, we verified the substrate through fine pitch probing and applied the Boundary Scan Test (BST) for verifying the complex packaging/assembling processes, through which we developed an efficient and cost-effective product.

• Journal of the Microelectronics and Packaging Society
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• v.6 no.4
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• pp.1-7
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• 1999

We developed Fabrication process of embedded passive components in MCM-D substrate. The proposed MCM-D substrate is based on Cu/photosensitive BCB multilayer. The substrate used is Si wafer and Ti/cu metallization is used to form the interconnect layer. Interconnect layers are formed with 1000$\AA$ Ti/3000$\AA$ Cu by sputtering method and 3$\mu\textrm{m}$ Cu by electrical plating method. In order to form the vias in photosensitive BCB layer, the process of BCB and plasma etch using $C_2F_6$ gas were evaluated. The MCM-D substrate is composed of 5 dielectric layers and 4 interconnect layers. Embedded resistors are made with NiCr and implemented on the $2^{nd}$ dielectric layer. The sheet resistance of NiCr is controlled to be about 21 $\Omega$/sq at the thickness of 600$\AA$. The multi-turn sprial inductors are designed in coplanar fashion on the $4^{th}$ interconnect layer with an underpass from the center to outside using the lower $3^{rd}$ interconnect layer. Capacitors are designed and realized between $1^{st}$ interconnect layer and $2^{nd}$ interconnect layer. An important issue in capacitor is the accurate determination of the dielectric thickness. We use the 900$\AA$ thickness of PECVD silicon nitride film as dielectric. Capacitance per unit area is about 88nF/$\textrm {cm}^2$at the thickness of 900$\AA$. The advantage of this integration process is the compatibility with the conventional semiconductor process due to low temperature PECVD silicon nitride process and thermal evaporation NiCr process.

• Journal of the Microelectronics and Packaging Society
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• v.17 no.1
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• pp.33-39
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• 2010

Printing technologies have been indicated as alternative methods for patterning conductive, semi-conductive or insulative materials on account of their low-cost, large-area patternability and pattern flexibility. For application of the printing technologies in manufacture of semiconductor or display modules, ink or paste composed of nanoparticles, solvent and additives are basically needed. Here, we report recent advances in eco-friendly nano-ink technology for semiconductor and display technology. Then, we will introduce an eco-friendly ink formation technology developed in our group with an example of manufacturing $SiO_2$ nanopowders and inks. We tried to manufacture ultrafine $SiO_2$ nanoparticles by applying a low-temperature synthetic method, and then attempted to fabricate the printed $SiO_2$ film onto the glass substrate to see whether the $SiO_2$ nanoparticles are feasible for the printing or not. Finally, the electrical characteristics of the films were measured to investigate the effect of the manufacturing parameters.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.1042-1045
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• 2005

The feasibility of graphoepitaxial growth of compound semiconductor has been studied. Two kinds of substrates were prepared; one is smooth substrate, the other one is a periodic structured substrate. ZnO film was deposited on both substrates by sputtering, and thermal treatment was performed to improve the crystal quality and investigate the effect of the periodic structure. Atomic force microscopy (AFM) and photoluminescence (PL) were used to characterize the samples. As a result, very similarchange, the improvement of crystallinity, has been observed from both samples, except the sample annealed at the highest temperature. It implies the periodic structure affects the crystallinity of the films, and the graphoepitaxy of compound semiconductors is possible by using appropriate surface structure.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.1026-1029
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• 2005

The feasibility of graphoepitaxial growth of compound semiconductors has been studied. Two kinds of substrates were prepared; one is smooth substrate, the other one is a periodic structured substrate. ZnO film was formed on both substrates by thermal evaporation of elemental Zn and natural oxidation of the deposited Zn. Thermal treatment was performed to improve the crystal quality and to investigate the effect of the periodic structure. Atomic force microscopy (AFM) and photoluminescence (PL) were used to characterize the samples. As a result, the improvement of crystallinity as annealing temperature increase, has been observed from both samples. The samples, annealed at 800 $^{\circ}$C, show the best crystal quality in terms of PL linewidth. Also the sample grown on grating structure shows better crystal quality than the sample grown on flat substrate. It implies that the periodic structure affects the crystallinity of the films, and the graphoepitaxy of compound semiconductors is possible by using appropriate surface structure.

• Journal of Sensor Science and Technology
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• v.24 no.6
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• pp.404-411
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• 2015

A stoichiometric mixture of evaporating materials for $BaAl_2Se_4$ single crystal thin films was prepared from horizontal electric furnace. To obtain the single crystal thin films, $BaAl_2Se_4$ mixed crystal was deposited on thoroughly etched semi-insulating GaAs(100) substrate by the Hot Wall Epitaxy (HWE) system. The source and substrate temperatures were $610^{\circ}C$ and $410^{\circ}C$, respectively. The crystalline structure of the single crystal thin films was investigated by the photoluminescence and double crystal X-ray diffraction (DCXD). The carrier density and mobility of $BaAl_2Se_4$ single crystal thin films measured from Hall effect by van der Pauw method are $8.29{\times}10^{-16}cm^{-3}$ and $278cm^2/vs$ at 293 K, respectively. The temperature dependence of the energy band gap of the $BaAl_2Se_4$ obtained from the absorption spectra was well described by the Varshni's relation, $E_g(T)=3.4205eV-(4.3112{\times}10^{-4}eV/K)T^2/(T+232 K)$. The crystal field and the spin-orbit splitting energies for the valence band of the $BaAl_2Se_4$ have been estimated to be 249.4 meV and 263.4 meV, respectively, by means of the photocurrent spectra and the Hopfield quasicubic model. These results indicate that the splitting of the ${\Delta}so$ definitely exists in the ${\Gamma}_5$ states of the valence band of the $BaAl_2Se_4/GaAs$ epilayer. The three photocurrent peaks observed at 10 K are ascribed to the $A_1$-, $B_1$-exciton for n =1 and $C_{31}$-exciton peaks for n=31.