• Title/Summary/Keyword: Field Implementation

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Design and Implementation of BACnet MS/TP Field Controller Prototype and MS/TP Network Monitoring System (BACnet MS/TP 필드제어기 프로토타입 및 MS/TP 네트워크 감시 장치의 설계 및 구현)

  • Park, Tae-Jin;Hong, Seung-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.4
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    • pp.799-808
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    • 2007
  • BACnet is an international standard communication protocol especially designed for building automation and control systems. BACnet uses the Master-Slave/Token-Passing (MS/TP) protocol as one of its field-level networks. A BACnet MS/TP field controller prototype and MS/TP network monitoring system are developed in this study. This report introduces the design and implementation methodology of a BACnet MS/TP field controller hardware, firmware and protocol stack. This report also presents the implementation methodology of BACnet MS/TP network monitoring system using VTS (Visual Test Shell). The methodologies introduced in this report will facilitate the develop and implementation of the BACnet-based control systems in building automation area.

A study on Ubiquitous Rail System Implementation Scheme (유비쿼터스 레일 시스템 구축을 위한 추진전략 연구)

  • Yang, Doh-Chul;Lee, Jun-Moon;Moon, Dae-Seop
    • Proceedings of the KSR Conference
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    • 2008.11b
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    • pp.2090-2095
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    • 2008
  • Ubiquitous information technology creates new space connected to electronic and physical space and makes new life pattern come true. Although it is expected that ubiquitous technology will lead significant changes on various life fields, relevant studies on its market needs, customer needs in social and cultural context and its necessity at organizational level have been passively carried out. What is worse, IT technology application scheme in railway field has not fully established since railway field's technology development is mainly focused on hardware compared with road and air traffic. In order to apply ubiquitous technology to railway field, therefore, it is required to identify ubiquitous technology functions which applicable to railway field and to establish ubiquitous rail system implementation scheme for end users. In this paper, we suggested implementation scheme for u-Rail which sorts railway industry by its components in order to implement service centered ubiquitous technology to each railway industry field.

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Implementation of the modified compression field theory in a tangent stiffness-based finite element formulation

  • Aquino, Wilkins;Erdem, Ibrahim
    • Steel and Composite Structures
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    • v.7 no.4
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    • pp.263-278
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    • 2007
  • A finite element implementation of the modified compression field theory (MCFT) using a tangential formulation is presented in this work. Previous work reported on implementations of MCFT has concentrated mainly on secant formulations. This work describes details of the implementation of a modular algorithmic structure of a reinforced concrete constitutive model in nonlinear finite element schemes that use a Jacobian matrix in the solution of the nonlinear system of algebraic equations. The implementation was verified and validated using experimental and analytical data reported in the literature. The developed algorithm, which converges accurately and quickly, can be easily implemented in any finite element code.

Arithmetic of finite fields with shifted polynomial basis (변형된 다항식 기저를 이용한 유한체의 연산)

  • 이성재
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.9 no.4
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    • pp.3-10
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    • 1999
  • More concerns are concentrated in finite fields arithmetic as finite fields being applied for Elliptic curve cryptosystem coding theory and etc. Finite fields arithmetic is affected in represen -tation of those. Optimal normal basis is effective in hardware implementation and polynomial field which is effective in the basis conversion with optimal normal basis and show that the arithmetic of finite field with the basis is effective in software implementation.

Resource and Delay Efficient Polynomial Multiplier over Finite Fields GF (2m) (유한체상의 자원과 시간에 효율적인 다항식 곱셈기)

  • Lee, Keonjik
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.16 no.2
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    • pp.1-9
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    • 2020
  • Many cryptographic and error control coding algorithms rely on finite field GF(2m) arithmetic. Hardware implementation of these algorithms needs an efficient realization of finite field arithmetic operations. Finite field multiplication is complicated among the basic operations, and it is employed in field exponentiation and division operations. Various algorithms and architectures are proposed in the literature for hardware implementation of finite field multiplication to achieve a reduction in area and delay. In this paper, a low area and delay efficient semi-systolic multiplier over finite fields GF(2m) using the modified Montgomery modular multiplication (MMM) is presented. The least significant bit (LSB)-first multiplication and two-level parallel computing scheme are considered to improve the cell delay, latency, and area-time (AT) complexity. The proposed method has the features of regularity, modularity, and unidirectional data flow and offers a considerable improvement in AT complexity compared with related multipliers. The proposed multiplier can be used as a kernel circuit for exponentiation/division and multiplication.

Elliptic Curve Cryptography Coprocessors Using Variable Length Finite Field Arithmetic Unit (크기 가변 유한체 연산기를 이용한 타원곡선 암호 프로세서)

  • Lee Dong-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.1
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    • pp.57-67
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    • 2005
  • Fast scalar multiplication of points on elliptic curve is important for elliptic curve cryptography applications. In order to vary field sizes depending on security situations, the cryptography coprocessors should support variable length finite field arithmetic units. To determine the effective variable length finite field arithmetic architecture, two well-known curve scalar multiplication algorithms were implemented on FPGA. The affine coordinates algorithm must use a hardware division unit, but the projective coordinates algorithm only uses a fast multiplication unit. The former algorithm needs the division hardware. The latter only requires a multiplication hardware, but it need more space to store intermediate results. To make the division unit versatile, we need to add a feedback signal line at every bit position. We proposed a method to mitigate this problem. For multiplication in projective coordinates implementation, we use a widely used digit serial multiplication hardware, which is simpler to be made versatile. We experimented with our implemented ECC coprocessors using variable length finite field arithmetic unit which has the maximum field size 256. On the clock speed 40 MHz, the scalar multiplication time is 6.0 msec for affine implementation while it is 1.15 msec for projective implementation. As a result of the study, we found that the projective coordinates algorithm which does not use the division hardware was faster than the affine coordinate algorithm. In addition, the memory implementation effectiveness relative to logic implementation will have a large influence on the implementation space requirements of the two algorithms.

Field programmable analog arrays for implementation of generalized nth-order operational transconductance amplifier-C elliptic filters

  • Diab, Maha S.;Mahmoud, Soliman A.
    • ETRI Journal
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    • v.42 no.4
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    • pp.534-548
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    • 2020
  • This study presents a new architecture for a field programmable analog array (FPAA) for use in low-frequency applications, and a generalized circuit realization method for the implementation of nth-order elliptic filters. The proposed designs of both the FPAA and elliptic filters are based on the operational transconductance amplifier (OTA) used in implementing OTA-C filters for biopotential signal processing. The proposed FPAA architecture has a flexible, expandable structure with direct connections between configurable analog blocks (CABs) that eliminates the use of switches. The generalized elliptic filter circuit realization provides a simplified, direct synthetic method for an OTA-C symmetric balanced structure for even/odd-nth-order low-pass filters (LPFs) and notch filters with minimum number of components, using grounded capacitors. The filters are mapped on the FPAA, and both architectures are validated with simulations in LTspice using 90-nm complementary metal-oxide semiconductor (CMOS) technology. Both proposed FPAA and filters generalized synthetic method achieve simple, flexible, low-power designs for implementation of biopotential signal processing systems.

An Empirical Study on the Implementation Model of Global e-trade (글로벌 전자무역 구현모델의 실증분석)

  • Lee, Sang-Jin;Chung, Ja-Son
    • International Commerce and Information Review
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    • v.8 no.2
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    • pp.119-139
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    • 2006
  • The purpose of this research is to analyze four models of global e-trade implementation which was suggested at the advance research of implementation global e-Trade with major trading countries. The main outcomes of this empirical study are as follows. For realizing global e-trade of G-Networking model country we have to implement e-trade in the field of "import & logistics". And for realizing global e-trade of P-Networking model country, it need to try in "settlement & clearance". Furthermore, for realizing global e-Trade of G-Penetration model country, we have known that the field of "import & logistics" would be implemented. Finally for realizing global e-Trade of P-Penetration model country, "settlement & clearance" could be implemented. Also, this study suggests that we have to do negotiation with China and Japan at first, and to try the area of settlement & clearance to implement the global e-Trade with Korea's 10 major trading countries.

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Low Complexity Systolic Montgomery Multiplication over Finite Fields GF(2m) (유한체상의 낮은 복잡도를 갖는 시스톨릭 몽고메리 곱셈)

  • Lee, Keonjik
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.18 no.1
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    • pp.1-9
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    • 2022
  • Galois field arithmetic is important in error correcting codes and public-key cryptography schemes. Hardware realization of these schemes requires an efficient implementation of Galois field arithmetic operations. Multiplication is the main finite field operation and designing efficient multiplier can clearly affect the performance of compute-intensive applications. Diverse algorithms and hardware architectures are presented in the literature for hardware realization of Galois field multiplication to acquire a reduction in time and area. This paper presents a low complexity semi-systolic multiplier to facilitate parallel processing by partitioning Montgomery modular multiplication (MMM) into two independent and identical units and two-level systolic computation scheme. Analytical results indicate that the proposed multiplier achieves lower area-time (AT) complexity compared to related multipliers. Moreover, the proposed method has regularity, concurrency, and modularity, and thus is well suited for VLSI implementation. It can be applied as a core circuit for multiplication and division/exponentiation.

On Efficient Algorithms for Generating Fundamental Units and their H/W Implementations over Number Fields (효율적인 수체의 기본단수계 생성 알고리즘과 H/W 구현에 관한 연구)

  • Kim, Yong-Tae
    • The Journal of the Korea institute of electronic communication sciences
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    • v.12 no.6
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    • pp.1181-1188
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    • 2017
  • The unit and fundamental units of number fields are important to number field sieves testing primality of more than 400 digits integers and number field seive factoring the number in RSA cryptosystem, and multiplication of ideals and counting class number of the number field in imaginary quadratic cryptosystem. To minimize the time and space in H/W implementation of cryptosystems using fundamental units, in this paper, we introduce the Dirichlet's unit Theorem and propose our process of generating the fundamental units of the number field. And then we present the algorithm generating our fundamental units of the number field to minimize the time and space in H/W implementation and implementation results using the algorithm over the number field.