• Title/Summary/Keyword: Ferroelectrics thin film

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Microstrip line tunable phase shifter (마이크로스트립 라인 전압제어 가변 대역통과필터)

  • ;Mai linh
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2002.05a
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    • pp.227-229
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    • 2002
  • In this paper, we report on a microstrip line voltage controlled tunable bandpass filter. We used the characteristic the relative dielectric constant of thin film ferroelectrics depends on the applied dr voltage. we designed using Au/BSTO/MgO/Au structure. We cascaded many resonators for large furling range sustaining 1 GHz renter frequency, narrow band, low IL ($\leq$4 dB). We could design the BPF of which center frequency is 16 GHz, 1.9 GHz tuning range, the narrow bandwidth within 800 MHz, low insertion loss less than 3 dB by adjusting the gap of 3 cascaded resonators.

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Hydrogenated a-Si TFT Using Ferroelectrics (비정질실리콘 박막 트랜지스터)

  • Hur Chang-Wu
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.3
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    • pp.576-581
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    • 2005
  • In this paper. the a-Si:H TFT using ferroelectric of $SrTiO_3$ as a gate insulator is fabricated on glass. High k gate dielectric is required for on-current, threshold voltage and breakdown characteristics of TFT Dielectric characteristics of ferroelectric are superior to $SiO_2$ and $Si_3N_4$. Ferroelectric increases on-current and decreases threshold voltage of TFT and also ran improve breakdown characteristics.$SrTiO_4$ thin film is deposited by e-beam evaporation. Deposited films are annealed for 1 hour in N2 ambient at $150^{\circ}C\~600^{\circ}C$. Dielectric constant of ferroelectric is about 60-100 and breakdown field is about IMV/cm. In this paper, the TFT using ferroelectric consisted of double layer gate insulator to minimize the leakage current. a-SiN:H, a-Si:H (n-type a-Si:H) are deposited onto $SrTiO_3$ film to make MFNS(Metal/ferroelectric/a-SiN:H/a-Si:H) by PECVD. In this paper, TFR using ferroelectric has channel length of$8~20{\mu}m$ and channel width of $80~200{\mu}m$. And it shows that drain current is $3.4{\mu}A$at 20 gate voltage, $I_{on}/I_{off}$ is a ratio of $10^5\~10^8,\;and\;V_{th}$ is$4\~5\;volts$, respectively. In the case of TFT without having ferroelectric, it indicates that the drain current is $1.5{\mu}A$ at 20gate voltage and $V_{th}$ is $5\~6$ volts. If properties of the ferroelectric thin film are improved, the performance of TFT using this ferroelectric thin film can be advanced.

Effects of Substrate Temperatures on the Crystallinity and Electrical Properties of PLZT Thin Films (기판온도에 따른 PLZT 박막의 결정성과 전기적 특성)

  • Lee, In-Seok;Yoon, Ji-Eun;Kim, Sang-Jih;Son, Young-Guk
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.22 no.1
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    • pp.29-34
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    • 2009
  • PLZT thin films were deposited on platinized silicon (Pt/$TiSiO_2$/Si) substrate by RF magnetron sputtering. A $TiO_2$ buffer layer was fabricated, prior to deposition of PLZT films. the layer was strongly affected the crystallographic orientation of the PLZT films. X-ray diffraction was performed on the films to study the crystallization of the films as various substrate temperatures (Ts). According to increasing Ts, preferred orientation of films was changed (110) plane to (111) plane. The ferroelectric, dielectric and electrical properties of the films were also investigated in detail as increased substrate temperatures. The PLZT films deposited at $400^{\circ}C$ showed good ferroelectric properties with the remnant polarization of $15.8{\mu}C/cm^2$ and leakage current of $5.4{\times}10^{-9}\;A/cm^2$.

The Properties of $Bi_2Mg_{2/3}Nb_{4/3}O_7$ Thin Films Deposited on Copper Clad Laminates For Embedded Capacitor (임베디드 커패시터의 응용을 위해 CCL 기판 위에 평가된 BMN 박막의 특성)

  • Kim, Hae-Won;Ahn, Jun-Ku;Ahn, Kyeong-Chan;Yoon, Soon-Gil
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.06a
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    • pp.45-45
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    • 2007
  • Capacitors among the embedded passive components are most widely studied because they are the major components in terms of size and number and hard to embed compared with resistors and inductors due to the more complicated structure. To fabricate a capacitor-embedded PCB for in-line process, it is essential to adopt a low temperature process (<$200^{\circ}C$). However, high dielectric materials such as ferroelectrics show a low permittivity and a high dielectric loss when they are processed at low temperatures. To solve these contradicting problems, we studied BMN materials as a candidate for dielectric capacitors. processed at PCB-compatible temperatures. The morphologies of BMN thin films were investigated by AFM and SEM equipment. The electric properties (C-F, I-V) of Pt/BMN/Cu/polymer were evaluated using an impedance analysis (HP 4194A) and semiconductor parameter analyzer (HP4156A). $Bi_2Mg_{2/3}Nb_{4/3}O_7$(BMN) thin films deposited on copper clad laminate substrates by sputtering system as a function of Ar/$O_2$ flow rate at room temperature showed smooth surface morphologies having root mean square roughness of approximately 5.0 nm. 200-nm-thick films deposited at RT exhibit a dielectric constant of 40, a capacitance density of approximately $150\;nF/cm^2$, and breakdown voltage above 6 V. The crystallinity of the BMN thin films was studied by TEM and XRD. BMN thin film capacitors are expected to be promising candidates as embedded capacitors for printed circuit board (PCB).

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a-Si:H TFT Using Ferroelectrics as a Gate Insulator

  • Hur, Chang-Wu;Kung Sung;Jung-Soo, Youk;Sangook Moon;Kim, Jung-Tae
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2004.05a
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    • pp.53-56
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    • 2004
  • The a-Si:H TFT using ferroelectric of SrTi $O_3$as a gate insulator is fabricated on glass. Dielectric characteristics of ferroelectric are superior to $SiO_2$and S $i_3$ $N_4$. Ferroelctric increases on-current, decreases thresh old voltage of TFT and also improves breakdown characteristics. The a-SiN:H has optical band gap of 2.61 eV, refractive index of 1.8~2.0 and resistivity of 10$^{13}$ - 10$^{15}$ $\Omega$cm, respectively. Insulating characteristics of ferroelectrics are excellent because dielectric constant of ferroelectric is about 60~100 and breakdown strength is over 1MV/cm. TFT using ferroelectric has channel length of 8~20${\mu}{\textrm}{m}$ and channel width of 80~200${\mu}{\textrm}{m}$. And it shows that drain current is 3.4$mutextrm{A}$ at 20 gate voltage, $I_{on}$ / $I_{off}$ is a ratio of 10$^{5}$ - 10$^{8}$ and $V_{th}$ is 4~5 volts, respectively. In the case of TFT without ferroelectric, it indicates that the drain current is 1.5 $mutextrm{A}$ at 20 gate voltage and $V_{th}$ is 5~6 volts. With the improvement of the ferroelectric thin film properties, the performance of TFT using this ferroelectric has advanced as a gate insulator fabrication technology is realized.zed.d.

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The Effect of Ar/O2 Partial Pressure Ratio on the Ferroelectric Properties of (Pb0.92La0.08)(Zr0.65Ti0.35)O3 Thin Films Deposited by RF Magnetron Sputtering Method (RF Magnetron Sputtering법으로 제작된 (Pb0.92La0.08)(Zr0.65Ti0.35)O3 박막의 Ar/O2 분압비에 따른 강유전 특성연구)

  • Kim, Sang-Jih;Yoon, Ji-Eon;Hwang, Dong-Hyun;Lee, In-Seok;Ahn, Jung-Hoon;Son, Young-Guk
    • Journal of the Korean Vacuum Society
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    • v.18 no.2
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    • pp.141-146
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    • 2009
  • PLZT ferroelectric thin films were deposited on Pt/Ti/$SiO_2$/Si substrate with $TiO_2$ buffer layer in between by rf magnetron sputtering method. In order to investigate the effect of Ar/$O_2$ partial pressure ratio on the ferroelectric properties of PLZT thin films, PLZT thin films were deposited at various Ar/$O_2$ partial pressure ratio ; 27/1.5 seem, 23/5.5 seem, 21/7.5 seem and 19/9.5 seem. The crystallinities of PLZT thin films were analyzed by XRD. The surface morphology was observed using FE-SEM. The P-E hysteresis loops, the remanent polarization characteristics and the leakage current characteristics were obtained using a Precision LC. The crystallinity and elaborateness of PLZT thin films were decreased as increasing the oxygen partial pressure ratio. And preferred orientation of PLZT thin films changed from (110) plane to (111) plane. The oxygen partial pressure ratio affects the thin film surface morphology and the ferroelectric properties.

a-Si:H TFT Using Ferroelectrics as a Gate Insulator (강유전체를 게이트 절연층으로 한 수소화 된 비정질실리콘 박막 트랜지스터)

  • 허창우;윤호군;류광렬
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2003.10a
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    • pp.537-541
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    • 2003
  • The a-Si:H TFTs using ferroelectric of SrTiO$_3$, as a gate insulator is fabricated on glass. Dielectric characteristics of ferroelectric is better than SiO$_2$, SiN. Ferroelectric increases ON-current, decreases threshold voltage of TFT and also breakdown characteristics. The a-Si:H deposited by PECVD shows absorption band peaks at wavenumber 2,000 $cm^{-1}$ /, 635 $cm^{-1}$ / and 876 $cm^{-1}$ / according to FTIR measurement. Wavenumber 2,000 $cm^{-1}$ /, 635 $cm^{-1}$ / are caused by stretching and rocking mode SiH1. The wavenumber of weaker band, 876 $cm^{-1}$ / is due to SiH$_2$ vibration mode. The a-SiN:H has optical bandgap of 2.61 eV, refractive index of 1.8 - 2.0 and resistivity of 10$^{11}$ - 10$^{15}$ aim respectively. Insulating characteristics of ferroelectric is excellent because dielectric constant of ferroelectric is about 60 - 100 and breakdown strength is over 1 MV/cm. TFT using ferroelectric has channel length of 8 - 20 $\mu$m and channel width of 80 - 200 $\mu$m. And it shows drain current of 3 $\mu$A at 20 gate voltages, Ion/Ioff ratio of 10$^{5}$ - 10$^{6}$ and Vth of 4 - 5 volts.

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Direct Imaging of Polarization-induced Charge Distribution and Domain Switching using TEM

  • O, Sang-Ho
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.08a
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    • pp.99-99
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    • 2013
  • In this talk, I will present two research works in progress, which are: i) mapping of piezoelectric polarization and associated charge density distribution in the heteroepitaxial InGaN/GaN multi-quantum well (MQW) structure of a light emitting diode (LED) by using inline electron holography and ii) in-situ observation of the polarization switching process of an ferroelectric Pb(Zr1-x,Tix)O3 (PZT) thin film capacitor under an applied electric field in transmission electron microscope (TEM). In the first part, I will show that strain as well as total charge density distributions can be mapped quantitatively across all the functional layers constituting a LED, including n-type GaN, InGaN/GaN MQWs, and p-type GaN with sub-nm spatial resolution (~0.8 nm) by using inline electron holography. The experimentally obtained strain maps were verified by comparison with finite element method simulations and confirmed that not only InGaN QWs (2.5 nm in thickness) but also GaN QBs (10 nm in thickness) in the MQW structure are strained complementary to accommodate the lattice misfit strain. Because of this complementary strain of GaN QBs, the strain gradient and also (piezoelectric) polarization gradient across the MQW changes more steeply than expected, resulting in more polarization charge density at the MQW interfaces than the typically expected value from the spontaneous polarization mismatch alone. By quantitative and comparative analysis of the total charge density map with the polarization charge map, we can clarify what extent of the polarization charges are compensated by the electrons supplied from the n-doped GaN QBs. Comparison with the simulated energy band diagrams with various screening parameters show that only 60% of the net polarization charges are compensated by the electrons from the GaN QBs, which results in the internal field of ~2.0 MV cm-1 across each pair of GaN/InGaN of the MQW structure. In the second part of my talk, I will present in-situ observations of the polarization switching process of a planar Ni/PZT/SrRuO3 capacitor using TEM. We observed the preferential, but asymmetric, nucleation and forward growth of switched c-domains at the PZT/electrode interfaces arising from the built-in electric field beneath each interface. The subsequent sideways growth was inhibited by the depolarization field due to the imperfect charge compensation at the counter electrode and preexisting a-domain walls, leading to asymmetric switching. It was found that the preexisting a-domains split into fine a- and c-domains constituting a $90^{\circ}$ stripe domain pattern during the $180^{\circ}$ polarization switching process, revealing that these domains also actively participated in the out-of-plane polarization switching. The real-time observations uncovered the origin of the switching asymmetry and further clarified the importance of charged domain walls and the interfaces with electrodes in the ferroelectric switching processes.

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