• 제목/요약/키워드: Faults

검색결과 2,952건 처리시간 0.031초

Multiple Faults Detection and Isolation via Decentralized Sliding Mode Observer for Reconfigurable Manipulator

  • Zhao, Bo;Li, Chenghao;Ma, Tianhao;Li, Yuanchun
    • Journal of Electrical Engineering and Technology
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    • 제10권6호
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    • pp.2393-2405
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    • 2015
  • This paper considers a decentralized multiple faults detection and isolation (FDI) scheme for reconfigurable manipulators. Inspired by their modularization property, a global sliding mode (GSM) based stable adaptive fuzzy decentralized controller is investigated for the system in fault free, while for the system suffering from multiple faults (actuator fault and sensor fault), the decentralized sliding mode observer (DSMO) is employed to detect their occurrence. Hereafter, the time and location of faults can be determined by a fault isolation scheme via a bank of DSMOs. Finally, the effectiveness of the proposed schemes in controlling, detecting and isolating faults is illustrated by the simulations of two 3-DOF reconfigurable manipulators with different configurations successfully.

배전계통 고장위치 검출방법에 관한 연구 (A Study on the Estimating Locations of Faults on Distribution Power Systems)

  • 김미영;오용택;노대석
    • 대한전기학회논문지:전력기술부문A
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    • 제53권12호
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    • pp.670-677
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    • 2004
  • The Conventional approach for estimating the locations of transmission line shunt faults has been to measure the apparent impedance to the fault from a line terminal and to convert the reactive component of the impedance to line length. But, these methods do not adequately address the problems associated with the fault location on distribution systems. This thesis presents a technique that estimates the location of shunt fault on a radial distribution system that has several single and multiphase laterals. Tapped loads and non-homogenity of the distribution system are take into account. The developed technique, which can handle shunt faults was tested to evaluate its suitability. Results from computer simulation of faults on a model of a 25KV distribution lines like real system are presented. The results approved that the proposed technique works well for estimating the locations of the distribution line shunt faults.

결함유형에 따른 소프트웨어 신뢰도와 소프트웨어 상품화 최적 시기 전략 (A Cost-Reliability Model for the Optimal Release Time of a Software System)

  • 김영휘;이완형
    • 한국국방경영분석학회지
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    • 제16권2호
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    • pp.135-150
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    • 1990
  • This paper classifies faults into three types : simple, degenerated, and regenerated faults. This paper also deals with the characteristics of each type of fault to determine the software reliability based on the assumption; i. e., a system consisting of several subsystems (modules) which may be debugged simultaneously. For each type of fault, several formulas are developed to obtain the failure rate and the expected number of failures found during debugging. A model is developed based on the formulas of the failure rate and the expected number of failures to decide the optimal release time of a new software: minimizing the total cost with constraints restricting to the failure rate of each module in the software. By using this model, optimal release times are found for some cases; the eliminated faults are assumed simple faults only, regenerated faults only, simple and degenerated faults, and so on.

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Application of Multiple Parks Vector Approach for Detection of Multiple Faults in Induction Motors

  • Vilhekar, Tushar G.;Ballal, Makarand S.;Suryawanshi, Hiralal M.
    • Journal of Power Electronics
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    • 제17권4호
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    • pp.972-982
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    • 2017
  • The Park's vector of stator current is a popular technique for the detection of induction motor faults. While the detection of the faulty condition using the Park's vector technique is easy, the classification of different types of faults is intricate. This problem is overcome by the Multiple Park's Vector (MPV) approach proposed in this paper. In this technique, the characteristic fault frequency component (CFFC) of stator winding faults, rotor winding faults, unbalanced voltage and bearing faults are extracted from three phase stator currents. Due to constructional asymmetry, under the healthy condition these characteristic fault frequency components are unbalanced. In order to balanced them, a correction factor is added to the characteristic fault frequency components of three phase stator currents. Therefore, the Park's vector pattern under the healthy condition is circular in shape. This pattern is considered as a reference pattern under the healthy condition. According to the fault condition, the amplitude and phase of characteristic faults frequency components changes. Thus, the pattern of the Park's vector changes. By monitoring the variation in multiple Park's vector patterns, the type of fault and its severity level is identified. In the proposed technique, the diagnosis of faults is immune to the effects of unbalanced voltage and multiple faults. This technique is verified on a 7.5 hp three phase wound rotor induction motor (WRIM). The experimental analysis is verified by simulation results.

An Efficient Built-in Self-Test Algorithm for Neighborhood Pattern- and Bit-Line-Sensitive Faults in High-Density Memories

  • Kang, Dong-Chual;Park, Sung-Min;Cho, Sang-Bock
    • ETRI Journal
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    • 제26권6호
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    • pp.520-534
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    • 2004
  • As the density of memories increases, unwanted interference between cells and the coupling noise between bit-lines become significant, requiring parallel testing. Testing high-density memories for a high degree of fault coverage requires either a relatively large number of test vectors or a significant amount of additional test circuitry. This paper proposes a new tiling method and an efficient built-in self-test (BIST) algorithm for neighborhood pattern-sensitive faults (NPSFs) and new neighborhood bit-line sensitive faults (NBLSFs). Instead of the conventional five-cell and nine-cell physical neighborhood layouts to test memory cells, a four-cell layout is utilized. This four-cell layout needs smaller test vectors, provides easier hardware implementation, and is more appropriate for both NPSFs and NBLSFs detection. A CMOS column decoder and the parallel comparator proposed by P. Mazumder are modified to implement the test procedure. Consequently, these reduce the number of transistors used for a BIST circuit. Also, we present algorithm properties such as the capability to detect stuck-at faults, transition faults, conventional pattern-sensitive faults, and neighborhood bit-line sensitive faults.

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고장 입력이 존재하는 비동기 순차 머신을 위한 내고장성 제어 (Fault-Tolerant Control of Asynchronous Sequential Machines with Input Faults)

  • 양정민
    • 전자공학회논문지
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    • 제53권7호
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    • pp.103-109
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    • 2016
  • 비동기 순차 머신을 위한 교정 제어는 이미 설계된 비동기 순차 머신의 오동작이나 머신에서 발생하는 고장의 영향을 없애는 새로운 제어 기법이다. 본 논문에서는 비동기 순차 머신 교정 제어 시스템의 입력단에서 일어나는 고장을 탐지하고 극복하는 방법을 제안한다. 교정 제어기는 제어 대상 머신의 입력단에서 일어나는 고장을 탐지할 수 있으나 외부 입력단에서 발생하는 고장은 알지 못한다. 이번 연구에서는 비동기 순차 머신을 사용하는 외부 운용자(operator)가 상태 피드백을 받아서 고장을 발견한 후 제어기에게 고장 극복 동작을 명령하는 방식으로 외부 입력단의 고장을 위한 내고장성 제어 기법을 완성한다.

Fault Detection and Diagnosis System for a Three-Phase Inverter Using a DWT-Based Artificial Neural Network

  • Rohan, Ali;Kim, Sung Ho
    • International Journal of Fuzzy Logic and Intelligent Systems
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    • 제16권4호
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    • pp.238-245
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    • 2016
  • Inverters are considered the basic building blocks of industrial electrical drive systems that are widely used for various applications; however, the failure of electronic switches mainly affects the constancy of these inverters. For safe and reliable operation of an electrical drive system, faults in power electronic switches must be detected by an efficient system that is capable of identifying the type of faults. In this paper, an open switch fault identification technique for a three-phase inverter is presented. Single, double, and triple switching faults can be diagnosed using this method. The detection mechanism is based on stator current analysis. Discrete wavelet transform (DWT) using Daubechies is performed on the Clarke transformed (-) stator current and features are extracted from the wavelets. An artificial neural network is then used for the detection and identification of faults. To prove the feasibility of this method, a Simulink model of the DWT-based feature extraction scheme using a neural network for the proposed fault detection system in a three-phase inverter with an induction motor is briefly discussed with simulation results. The simulation results show that the designed system can detect faults quite efficiently, with the ability to differentiate between single and multiple switching faults.

신경회로망과 고장전류의 변화를 이용한 고장판별 알고리즘에 관한 연구 (A Study on the Algorithm for Fault Discrimination in Transmission Lines Using Neural Network and the Variation of Fault Currents)

  • 여상민;김철환;최면송;송오영
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2000년도 하계학술대회 논문집 A
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    • pp.366-368
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    • 2000
  • When faults occur in transmission lines, the classification of faults is very important. If the fault is HIF(High Impedance Fault), it cannot be detected or removed by conventional overcurrent relays (OCRs), and results in fire hazards and causes damages in electrical equipment or personal threat. The fast discrimination of fault needs to effective protection and treatment and is important problem for power system protection. This paper proposes the fault detection and discrimination algorithm for LIFs(Low Impedance Faults) and HIFs(High Impedance Faults). This algorithm uses artificial neural networks and variation of 3-phase maximum currents per period while faults. A double lines-to-ground and line-to-line faults can be detected using Neural Network. Also, the other faults can be detected using the value of variation of maximum current. Test results show that the proposed algorithms discriminate LIFs and HIFs accurately within a half cycle.

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비동기 순차 머신의 비-기본모드에서 발생하는 고장 극복을 위한 교정 제어 (Fault-Tolerant Corrective Control for Non-fundamental Mode Faults in Asynchronous Sequential Machines)

  • 양정민;곽성우
    • 전기전자학회논문지
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    • 제24권3호
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    • pp.727-734
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    • 2020
  • 본 논문은 과도 고장을 가지는 비동기 순차 머신에 대한 내고장성 교정 제어를 다룬다. 본 논문에서 다루는 고장은 머신이 과도 상태 천이를 거칠 때 발현할 수 있으므로 비-기본 모드(non-fundamental mode)에서 원하지 않는 상태 천이를 일으킨다. 본 논문에서는 비동기 순차 머신의 비-기본 모드에서 발생하는 과도 고장을 탐지하고 극복할 수 있는 새로운 내고장성 제어 시스템을 제안한다. 교정 제어 이론의 틀 안에서 내고장성 제어기의 존재 조건과 설계 과정을 제시한다. 또한 제안된 제어 시스템의 효용성을 검증하기 위해 FPGA 실험을 실시한다.

탄화규소 휘스커의 (II): 적층결함 (Synthesis of Silicon Carbide Whiskers (II): Stacking Faults)

  • 최헌진;이준근
    • 한국세라믹학회지
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    • 제36권1호
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    • pp.36-42
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    • 1999
  • 2단계 열탄소환원법으로 탄화규소 휘스커를 기상-고상, 2단계, 기상-액상-고상 성장기구로 각각 합성하였다. 그리고 휘스커에 있는 적층결합을 X-ray와 투과전자현미경을 이용하여 분석하였다. 탄화규소 휘스커에 있는 적층결함은 휘스커의 지름과 상관관계가 있는 것으로 나타났다. 즉, 기상-고상, 2단계 성장, 기상-액상-고상 성장기구에 상관없이 지름이 1$\mu\textrm{m}$이하로 작아지는 경우 적층결합이 많아지고, 기상-액상-고상 기구로 성장한 지름이 2$\mu\textrm{m}$보다 큰 경우 적층결함이 거의 없는 것으로 나타났다. 이같은 현상은 휘스커 지름이 작아짐에 따라 휘스커의 비표면적이 증가하는 때문인 것으로 판단되었다.

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