• Journal of IKEEE
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• v.18 no.1
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• pp.1-7
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• 2014

In this paper, we suggest an improved Viola-Jones detection framework for the efficient feature selection and the fast rejection method of the sub-window. Our object detector has low computational complexity because it rejects sub-windows until specific threshold. Owing to using same framework, detection performance is same with the existing Viola-Jones detector. We measure the number of average feature calculation about MIT-CMU test set. As a result of the experiment, the number of average feature calculation is reduced to 45.5% and the detection speed is improved about 58.5% compared with the previous algorithm.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.41 no.6
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• pp.99-108
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• 2004

In this paper, a new fast detection and clutter rejection method is proposed for CCD-image-based Automatic Target Detection System. For defence application, fast computation is a critical point, thus we concentrated on the ability to detect various targets with simple computation. In training stage, 1D template set is generated by regional vertical projection and K-means clustering, and binary tree structure is adopted to reduce the number of template matching in test stage. We also use adaptive skip-width by Correlation-based Adaptive Predictive Search(CAPS) to further improve the detecting speed. In clutter rejection stage, we obtain Fourier Descriptor coefficients from boundary information, which are useful to rejected clutters.

• Journal of Power Electronics
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• v.3 no.2
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• pp.115-123
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• 2003

This paper presents analysis, design and simulation for the indirect field orientation control (IFOC) of induction machine drive system. The dynamic performance of the IFOC under nominal and detuned parameters of the induction machine is established. A conventional proportional plus integral-derivative (PI-D) two-degree-of-freedom controller (2DOFC) is designed and analysed for an ideal IFOC induction machine drive at nominal parameters with the desired dynamic response. Varying the induction machine parameters causes a degredation in the dynamic response for disturbance rejection and tracking performance with PI-D 2DOF speed controller. Therefore, conventional controllers can nut meet a wide range of speed tracking performance under parameter variations. To achieve high- dynamic performance, a proposed robust fuzzy logic controllers (RFLC) for d-axis rotor flux, d-q axis stator currents and rotor speed have been designed and analysed. These controllers provide robust tracking and disturbance rejection performance when detuning occurres and improve the dynamic behavior. The proposed REL controllers provide a fast and accurate dynamic response in tracking and disturbance rejection characteristics under parameter variations. Computer simulation results demonstrate the effectiveness of the proposed REL controllers and a robust performance is obtained fur IFOC induction machine drive system.

• Journal of electromagnetic engineering and science
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• v.6 no.2
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• pp.110-116
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• 2006

A reflective array type surface acoustic wave(SAW) dispersive delay line(DDL) with high time-bandwidth at the V/UHF-band is designed and fabricated for compressive receiver applications. This type of the SAW DDL has the properties of the relative bandwidth of 20 %, the time delay of 49.89 usec, the insertion loss of 38.5 dB and the side lobe rejection of 39 dB. In comparison with a commercial SAW DDL, the insertion loss, amplitude ripple and side lobe rejection are improved by $1.5dB{\pm}0.6dB$ and 4 dB respectively. Using the fabricated SAW DDL, the prototype of the compressive receiver is developed. It is composed of RF converter, fast tunable LO, chirp LO, A/D converter, signal processing unit and control unit. This prototype system shows a fine frequency resolution of below 30 kHz with high scan rate.

• The Journal of Korea Robotics Society
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• v.3 no.3
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• pp.245-254
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• 2008

Recently, many vision-based navigation methods have been introduced as an intelligent robot application. However, many of these methods mainly focus on finding an image in the database corresponding to a query image. Thus, if the environment changes, for example, objects moving in the environment, a robot is unlikely to find consistent corresponding points with one of the database images. To solve these problems, we propose a novel navigation strategy which uses fast motion estimation and a practical scene recognition scheme preparing the kidnapping problem, which is defined as the problem of re-localizing a mobile robot after it is undergone an unknown motion or visual occlusion. This algorithm is based on motion estimation by a camera to plan the next movement of a robot and an efficient outlier rejection algorithm for scene recognition. Experimental results demonstrate the capability of the vision-based autonomous navigation against dynamic environments.

• Journal of Institute of Control, Robotics and Systems
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• v.2 no.2
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• pp.73-80
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• 1996

This paper proposes a stabilizing controller for the multirate sampled-data systems which have a periodic output measurement scheme. A sufficient condition for maintaining observability in the multirate sampled-data system is derived and a design strategy for disturbance rejection is proposed. The proposed controller has IMC structure, and can be decomposed into the disturbance estimator and the inverse of the fast uniform sampled plant. We assume that the plant is open-loop stable and the disturbance consists of a sum of finite number of sinusoids with different frequencies. An example is presented for illustrations.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.32B no.3
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• pp.522-532
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• 1995

Multilayer neural networks with backpropagation learning algorithm are widely used for pattern classification problems. For many real applications, it is more important to reduce the misclassification rate than to increase the rate of successful classification. But multilayer perceptrons(MLP's) have drawbacks of slow learning speed and false convergence to local minima. In this paper, we propose a new method for character recognition problems with a single-layer network and double rejection mechanisms, which guarantees a very low misclassification rate. Comparing to the MLP's, it yields fast learning and requires a simple hardware architecture. We also introduce a new coding scheme to reduce the misclassification rate. We have prepared two databases: one with 135,000 digit patterns and the other with 117,000 letter patterns, and have applied the proposed method for printed character recognition, which shows that the method reduces the misclassification rate significantly without sacrificing the correct recognition rate.

• Journal of Power Electronics
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• v.18 no.5
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• pp.1523-1535
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• 2018

High-performance Phase-Locked Loops (PLLs) are critical for grid synchronization in grid-tied power electronic applications. In this paper, a new single-phase All Digital Phase-Locked Loop (ADPLL) is proposed. It features fast transient response and good robustness under distorted grid conditions. It is designed for Field Programmable Gate Array (FPGA) implementation. As a result, a high sampling frequency of 1MHz can be obtained. In addition, a new OSG is adopted to track the power frequency, improve the harmonic rejection and remove the dc offset. Unlike previous methods, it avoids extra feedback loop, which results in an enlarged system bandwidth, enhanced stability and improved dynamic performance. In this case, a new parameter optimization method with consideration of loop delay is employed to achieve a fast dynamic response and guarantee accuracy. The Phase Detector (PD) and Voltage Controlled Oscillator (VCO) are realized by a Coordinate Rotation Digital Computer (CORDIC) algorithm and a Direct Digital Synthesis (DDS) block, respectively. The whole PLL system is finally produced on a FPGA. A theoretical analysis and experiments under various distorted grid conditions, including voltage sag, phase jump, frequency step, harmonics distortion, dc offset and combined disturbances, are also presented to verify the fast dynamic response and good robustness of the ADPLL.

• 전자공학회논문지 IE
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• v.45 no.4
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• pp.1-6
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• 2008

A fast-hopping frequency synthesizer that reduces complexity and power consumption is presented for MB-OFDM UWB applications. The proposed architecture uses 3960 MHz LC VCO, 528 MHz ring oscillator, passive mixer and LC-tuned Q-enhancement BPF to generate Band Group 1 frequencies. The adjacent channel rejection ratio is less than -40 dBc for 3432 MHz and -H dBc for 4488 MHz. A fast switching SCL-tpre MUX is used to produce the required channel output signal and it takes less than 2.2 ns for band switching. The total power consumption is 47.9 mW from a 1.8 V supply.

• Proceedings of the Korea Information Processing Society Conference
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• 2013.11a
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• pp.1343-1346
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• 2013

본 연구에서는 기존의 Viola-Jones 물체 검출 프레임워크를 개선하여 하나의 특징 당 더 높은 효율을 가지며 검출대상이 아닌 서브 윈도우들을 더 빠르게 제거하는 학습 알고리즘을 제안한다. 학습의 결과로 생성된 물체 검출기는 서브윈도우를 특정 임계값까지 빠르게 제거하기 때문에 서브윈도우당 계산수가 줄어든다. 기존의 Viola-Jones 물체 검출기와 동일한 프레임워크이므로 인식성능에는 영향을 주지 않는다. MIT-CMU 테스트 집합에 대해서 서브윈도우당 특징 계산 횟수를 측정하였으며 기존 계산 횟수의 57%로 줄어들어 검출 속도가 약 71% 향상됨을 확인하였다.