• Journal of Multimedia Information System
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• 제4권1호
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• pp.19-26
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• 2017

The compression of video for both full HD and UHD requires the inclusion of extra vertical lines to every video frame, named as the DTV essential hidden area (DEHA), for the effective functioning of the MPEG-2/4/H encoder, stream, and decoder. However, while the encoding/decoding process is dependent on the DEHA, the DEHA is conventionally viewed as a redundancy in terms of channel utilization or storage efficiency. This paper proposes a block mode DEHA method to more effectively utilize the DEHA. Partitioning video block images and then evenly filling the representative DEHA macroblocks with the average DC coefficient of the active video macroblock can minimize the amount of DEHA data entering the compressed video stream. Theoretically, this process results in smaller DEHA data entering the video stream. Experimental testing of the proposed block mode DEHA method revealed a slight improvement in the quality of the active video. Outside of this technological improvement to video quality, the attractiveness of the proposed DEHA method is also heightened by the ease that it can be implemented with existing video encoders.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1685-1687
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• 2007

Excellent moving picture performance of plasma TV has been confirmed through the study and measurement using the method proposed by the APDC (Advanced PDP Development Center Corporation). Full-HD Plasma TVs with pixels of $1920{\times}1080[1]-[2]$, showed more than 900 TV-lines of resolution out of maximum scale of 1080, while typical LCD of the same pixel count showed only 1/3 of the plasma's performance. Moreover, even the latest 120Hz models of $1920{\times}1080$ LCD do not much PDPs with pixels of $1024{\times}768$, or $1366{\times}786$ in moving picture resolution. The measurement system proposed by the APDC showed very good agreement with subjective tests.

• Journal of the Optical Society of Korea
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• 제18권6호
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• pp.698-705
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• 2014

We propose a new development for calculating a computer-generated hologram (CGH) through the use of multiple general-purpose graphics processing units (GPGPUs). For optimization of the implementation, CGH parallelization, object point tiling, memory selection for object point, hologram tiling, CGMA (compute to global memory access) ratio by block size, and memory mapping were considered. The proposed CGH was equipped with a digital holographic video system consisting of a camera system for capturing images (object points) and CPU/GPGPU software (S/W) for various image processing activities. The proposed system can generate about 37 full HD holograms per second using about 6K object points.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.407-408
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• 2008

This paper presents a synchronous pipeline design for IP-based H.264 decoding system. The first optimization for pipelining aims at efficiently resolving the data dependency due to motion compensation/intra prediction feedback data flow in H.264 decoder. The second one would enhance the efficiency of execution per each pipelining stage to explore the optimized latency and stage number. Thus, the 3 stage pipeline of CAVLD&ITQ|MC/IP&Rec.|DF is obtained to yield the best throughput and implementation. In experiments, it is found that the synchronous pipelined H.264 decoding system, based on existing IPs, could deal with Full HD video at 125.34MHz, in real time.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.409-410
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• 2008

This paper presents nonlinear and parallel design for synchronous pipelining in IP-based H.264 decoder implementation. Since H.264 decoder includes the dataflow of feedback loop, the data dependency requires one NOP stage per pipelining latency to drop the throughput into 1/2. Further, it is found that, in execution time, the stage scheduled for MC is more occupied than that for CAVLD/ITQ/DF. The less efficient stage would be improved by nonlinear scheduling, while the fully-utilized stage could be accelerated by parallel scheduling of IP. The optimization yields 3 nonlinear {CAVLD&ITQ}|3 parallel (MC/IP&Rec.)| 3 nonlinear {DF} pipelined architecture for IP-based H.264 decoder. In experiments, the nonlinear and parallel pipelined H.264 decoder, including existing IPs, could deal with full HD video at 41.86MHz, in real time processing.

• 방송과미디어
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• 제21권1호
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• pp.59-69
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• 2016

2013년 1월에 완성된 HEVC (High Efficiency Video Coding) 표준은 full HD (High Definition) 해상도를 뛰어넘는 UHD (Ultra High Definition) 초고해상도 영상 서비스 수요를 반영하였으며, 기존의 H.264/AVC 대비 두 배 이상의 압축 성능을 달성하였다. 이러한 초고해상도 영상 서비스와 더불어 현실과 유사한 고명함도 (HDR : High Dynamic Range) 및 광색역 (WCG : Wide Color Gamut) 영상에 대한 수요 또한 증가하고 있다. 이러한 시장의 수요를 반영하여, HDR/WCG와 관련된 국제 표준 단체들에서는 활발한 표준화를 진행하고 있다. 본 고에서는 MPEG에서 진행되는 HDR/WCG 영상의 표준 기술동향에 대해 살펴보고, HDR/WCG 영상의 부호화 효율에 영향을 미치는 기술적 이슈들에 대해 소개한다.

• 한국방송∙미디어공학회:학술대회논문집
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• 한국방송공학회 2011년도 추계학술대회
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• pp.27-30
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• 2011

본 논문에서는 방송용주파수를 좀 더 효율적으로 활용하여 시청자가 쉽게 지상파방송을 직접 수신할 수 있도록 DTV 방송 수신환경 개선 방법에 대해 찾아보고 난시청해소와 차세대방송에 필요한 주파수 소요량을 정량적으로 제시하고자 한다. 특히 디지털전환 이후에 회수되는 700MHz 대역 (108MHz 주파수폭)에 대하여 UDTV 와 Full-HD 3DTV 기술을 적용한 차세대방송을 구축할 때 난시청해소와 시청자와 방송과 산업에 미치는 효과를 제시한다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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• pp.71-74
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• 2005

There have been various efforts to achieve a better PDP TV, which have low power consumption, high image quality and low price. As the results, the power consumption of LG's new 42 inch HD PDP could be lower than 42 inch LCD under the general movie display load condition. And the address discharge time lag of ${\sim}1\;{\mu}s$ for 42 and 50 inch XGA single scan by which the cost can be reduced and image quality can be improved was achieved by using new MgO material and driving waveform. In addition, we have suggested TCA (Triangular Color pixel Arrangement) cell structure for realizing the full HDTV of 60inch diagonal size, which has $1920{\times}1080$ resolution. The luminous efficiency of the suggested TCA structure has been increased about 40% compared with that of the conventional cell structure.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.101-103
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• 2009

Minimizing the residual impurity level on the MgO layer is the key factor for reducing temporal dark image sticking on bright screen. In this paper, to reduce the residual impurity level on the MgO layer of 50-in. full-HD ac-PDP with He (35%) - Xe (11%) contents, RF-plasma treatments on the MgO layer are adopted under various gases for plasma treatment. As a result of monitoring the difference in the display luminance between the before and after 5-min. sustain discharge with a square-type image at peak luminance, the Ar and Ar>$O_2$ plasma treatments can reduce the temporal dark image sticking on the bright screen in an ac-PDP.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.411-414
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• 2009

We report single and two-stacked WOLED. Two-stacked WOLED structure adopts fluorescent blue EML and phosphorescent (red+green) EML. Current efficiency, EQE and color coordinate of two-stacked WOLED are 54.5cd/A, 28.8% and CIExy (0.322, 0.345), respectively. Those of single WOLED are also 20cd/A, 10% and CIExy (0.29, 0.37), respectively. Dual-plate OLED Display (DOD) employing the single WOLED shows high aperture ratio up to 67% in 2-inch panel of which pixel size is equivalent to that of 32 inch Full HD.