• Journal of KIISE
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• v.44 no.2
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• pp.208-212
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• 2017

Flash SSDs have many advantages over the existing hard disks such as energy efficiency, shock resistance, and high I/O throughput. For these reasons, in combination with the emergence of innovative technologies such as 3D-NAND and V-NAND for cheaper cost-per-byte, flash SSDs have been rapidly replacing hard disks in many areas. However, the existing database engines, which have been developed mainly assuming hard disks as the storage, could not fully exploit the characteristics of flash SSDs (e.g. internal parallelism). In this paper, in order to utilize the internal parallelism intrinsic to modern flash SSDs for faster query processing, we implemented a prefetching method using asynchronous input/output as a new functionality for secondary index scans in MySQL InnoDB engine. Compared to the original InnoDB engine, the proposed prefetching-based scan scheme shows three-fold higher performance in the case of 16KB-page sizes, and about 4.2-fold higher performance in the case of 4KB-page sizes.

• Fire Science and Engineering
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• v.31 no.3
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• pp.19-24
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• 2017

Flammable substances are used in laboratories and industrial process. The flash point (FP) is one of the most important physical properties used to determine the potential for characterizing the fire and explosion hazard of liquids. The FP data at 101.3 kPa were measured for the binary systems {toluene+ethylbenzene}, {methlycyclohenxane+ethylbenzene} and {n-heptane+ ethylbenzene}. The experiments were performed according to the standard test method (ASTM D 3278) using a SETA closed cup flash point tester. The measured FPs were compared with the values predicted using the following activity coefficient models: Wilson, Non-Random Two Liquid (NRTL), and UNIversal QUAsiChemical (UNIQUAC). The average absolute deviation between the predicted and measured lower FP was less than 1.74 K.

• Journal of the Institute of Convergence Signal Processing
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• v.10 no.4
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• pp.289-293
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• 2009

This study proposes a novel double-base log encoder (DBLE) for flash Analog-to-Digital converters (ADCs). Analog inputs of flash ADCs are represented in logarithmic number systems with bases of 2 and 3 at the outputs of DBLE. A look up table stores the sets of exponents of base 2 and 3 values. This algorithm improves the performance of a DSP (Digital Signal Processor) system that takes outputs of a flash ADC, since the double-base log number representation does multiplication operation easily within negligible error range in ADC. We have designed and implemented 6 bits DBLE implemented with ROM (Read-Only Memory) architecture in a $0.18\;{\mu}m$ CMOS technology. The power consumption and speed of DBLE are better than the FAT tree and binary ROM encoders at the cost of more chip area. The DBLE can be implemented into SoC architecture with DSP to improve the processing speed.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.35 no.3
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• pp.246-254
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• 2022

Localized heat can be generated using electrically conductive word-lines built into a 3D NAND flash memory string. The heat anneals the gate dielectric layer and improves the endurance and retention characteristics of memory cells. However, even though the electro-thermal annealing can improve the memory operation, studies to investigate material failures resulting from electro-thermal stress have not been reported yet. In this context, this paper investigated how applying electro-thermal annealing of 3D NAND affected mechanical stability. Hot-spots, which are expected to be mechanically damaged during the electro-thermal annealing, can be determined based on understanding material characteristics such as thermal expansion, thermal conductivity, and electrical conductivity. Finally, several guidelines for improving mechanical stability are provided in terms of bias configuration as well as alternative materials.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.11
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• pp.56-62
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• 1999

All the cells on the whole memory array or a block of the memory array in the Flash EEPROM's are erased at the same time using Fowler-Nordheim (FN) tunneling. some of the cels are often overerased since the tunneling is not a self-limited process. In this paper, the optimum doping concentration of the floating gate solve the overerase problem has been studied. For these studies, N-type MOSFETs and MOS capacitors with various doping concentrations of the gate polysilicon have been fabricated and their electrical characteristics have been measured and analyzed. As the results of the experiment, it has been found that the overerase problem can be prevented if the doping concentration of the floating gate is low enough (i.e. below $1.3{\times}10^{18}/cm^3$). It is because the potential difference between the floating gate and the source is lowered due to the formation of the depletion layer in the floating gate and thus the erasing operation stops by itself after most of the electrons stored in the floating gate are extracted. On the other hand, the uniformity of the Vt and the gm has been significantly poor if the coping concentration of the floating, gate is too much lowered (i.e. below $1.3{\times}10^{17}/cm^3$), which is believed to be due to nonuniform loss of the dopants from the nonuniform segregation in the floating gate. Consequently, the optimum doping concentration of the floating gate to suppress the overerase problem and get the uniform Vt and has been found to range from $1.3{\times}10^{17}/cm^3$ to $1.3{\times}10^{18}/cm^3$ in the Flash EEPROM.

• The Magazine of the IEIE
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• v.42 no.7
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• pp.26-38
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• 2015

고집적화를 위한 Floating Gate NAND 개발과정에서 몇 차례 기술적 한계상황에 직면하였었지만, Air-Gap, Double patterning, Multi-level Cell, Error Correction Code과 같은 breakthrough idea 을 활용하여 1Xnm까지 성공적인 scale-down 을 하였고 10nm 까지도 바라보고 있지만, 10nm 미만으로는 적절한 방안을 찾지 못한 상황입니다. CTD 의 3D NAND Flash는 Aspect Ratio, Poly channel의 intrinsic 특성, Data 보존 능력 등 해결 해야 할 issue 들이 남아 있지만, F.G Flash 의 지난 20년간 Lesson-learn 과 Band engineering, Channel Si, PUC 의 요소기술 개발 및 System algorithm 개발, QLC 개발 등을 통하여 F.G Flash를 넘어 지속적인 Cost-down 이 가능할 것입니다.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.250-250
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• 2010

The random telegraph signal (RTS) for the NOR flash cell scaling is investigated. An innovative method to suppress the RTS, based on the device engineering, is proposed. By optimizing the channel doping profile and using the high-k tunnel dielectric, it is confirmed from three-dimensional (3-D) simulation, that the $V_{th}$ amplitude, dueto RTS, is significantly suppressed, from approximately 0.5 to 0.07 V in the middle of the channel at 45 nm NOR Flash technology. From this result, it is expected that the proposed method to suppress the RTS amplitude is essential for further cell size scaling in Flash memory.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.571-572
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• 2008

We propose a 4-bit 1.6GSample/s flash-A/D converter realized in a digital 0.18um 1-poly 4-metal CMOS technology. To achieve low power with good performance, we employ immanent C2MOS comparator scheme. The kickback noise is one of the most important issue in A/D comparator performance. To decrease the effect of kickback noise, here we introduce kickback neutralization technique. The designed A/D converter has an effective number of bits(ENOBs) of 3.93 while using 32mW operating at 1.6GHz.

• Fire Science and Engineering
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• v.33 no.4
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• pp.9-15
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• 2019

The flash points of DMF based organic solvent mixtures used in the synthetic leather manufacturing process were measured. The test group was composed of seven types of solvent mixtures, which included DMF, toluene, and MEK. Each flash point was tested according to the international standard test methods of KS M 2010. The flash points were then predicted using some prediction models and compared with the measured data. From the analysis results, the binary mixtures with a mole ratio of less than approximately 0.7 showed that the measured values were under 25 ℃. This showed that the expectation for the flammable risk lowering effects due to the mixing of high flash point materials was reduced. In addition, the predicted values were evaluated using the average absolute deviation (A.A.D). The results showed that the Le Chatelier's models had an "A.A.D" of 1.95 ℃ and were the closest to the measured values.

• Proceedings of the KOSOMBE Conference
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• v.1998 no.11
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• pp.55-56
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• 1998

The 3-D Fast Gradient Echo (Turbo FLASH, Turbo Fast Low Angle Shot) sequence is optimized to achieve a good T1 contrast using variable excitation flip angles. In Turbo FLASH sequence, depending on the contrast preparation scheme, various types of image contrast can be established. While proton density contrast is obtained when using a short repetition time with a short echo time and small flip angles, T1 or T2 weighting can be obtained with proper contrast preparation sequences applied before the above proton density Turbo FLASH sequence. To maximize the contrast to noise ratio while retaining a sharp impulse response (smooth frequency domain response), the excitation flip-angle pattern is optimized through simulation and experiments. The TI (the delay after the preparation sequence which is a 180 degree inversion RF pulse in the IR T1 weighted imaging case), TD (the delay time between the Turbo FLASH sequence and the next preparation), and TR are also optimized fur the best image quality. The proposed 3-D Turbo FLASH provides $1mm\times1mm\times1.5mm$ high resolution images within a reasonable 5-8 minutes of imaging time. The proposed imaging sequence has been implemented in a Medison's Magnum 1.0T system and verified through simulations as well as human volunteer imaging. The experimental results show the utility of the proposed method.