• 전기학회논문지
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• 제60권6호
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• pp.1255-1260
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• 2011

In this paper, we study on the reliability of Very High-rate Power Line Communication (VH-PLC) for Smart Grid, so that the resultant data rate is over 400Mbps at a physical layer. Firstly, reviewing the research trend of the PLC, we discuss the required techniques for supporting the Smart Grid. Considering a pre-specification with the value of several parameters, we investigate a multi-carrier modulation technique to overcome limitations of higher rate transmission under power line channel environments. Then, we propose a system specification of the VH-PLC in the sense of enhancing two features. One is resolving the problem of the co-existence of the deployed high-speed PLC according to the published standardization of KS X 4600-1 in Korea. The other is getting better performance on the grid adopting the diverse element techniques, such as multi-carrier modulation, a subcarrier utilization mode, a variable rate LDPC (Low Density Parity Check) code, and a time and frequency diversity technique. Further, a simulation tool, composed of an Event-Driven simulator and a Time-Driven simulator, is developed for the purpose of verifying the system performance and continuously cross-checking the test bench signal of the proposed VH-PLC system.

• 한국항해항만학회:학술대회논문집
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• 한국항해항만학회 1999년도 추계학술대회논문집
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• pp.73-81
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• 1999

Inchon Port is the second largest import-export port of Korea, and has the point ant issue such as the excessive logistics cost because of the limits of handing capacity and the chronic demurrage. There is few research activities on the analysis and improvement of the whole port operation, because Inchon Port not only has the dual dock system and various facilities but also handles a various kind of cargo. The purpose of this paper is to develop the simulation program as a long-term strategic support tool, considering the dual dock system and the TOC(terminal operation company) system executed from March, 1997 in Inchon Port. The basic input parameters such as arrival intervals, cargo tons, service rates are analyzed and the probability density function for this parameters are estimated. The main mechanism of simulation model is the discrete event-driven simulation and the next-event time advancing. The program is executed based on the knowledge base and database, and is constructed using VISUAL BASIC and ACCESS database. From the simulation model, it is possible to estimate the demurrage status through analyzing scenarios such as the variation of cargo ton and cargo handing level, the increase of service rate, and so on, and to establish the long-term port strategic plan.

• 정보처리학회논문지D
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• 제18D권4호
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• pp.261-274
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• 2011

최근의 경쟁적 비즈니스 환경은 각 기업으로 하여금 민첩성과 유연성을 요구하게 되었고, 이를 위하여 기업에서 제공하는 서비스에 대한 실시간 모니터링과 이를 통한 조기 의사 결정이 기업의 핵심 경쟁력이 되었다. 또한, 엔터프라이즈 시스템에서 발생하는 수 없이 많은 다양한 이벤트들을 효과적으로 처리하기 위하여 의미 있는 데이터를 필터링 할 수 있는 기술이 요구되고 있다. 하지만, 이와 관련된 기존의 연구는 BPEL엔진이나 미들웨어의 API에 의존한 모니터링으로 서비스 결함 발견에 그치고 있거나 낮은 단계의 이벤트(low-level event)에 기반한 단순 이벤트 처리에 그치고 있어, 기업에 유용한 비즈니스 정보를 제공하기에는 한계가 있다. 본 논문에서는 다중 상황 검출(situation detection)을 통해 보다 가치 있고 유용한 비즈니스 정보의 제공을 가능하게 하는 확장된 복합 이벤트 모델(complex event model)을 제시한다. 구체적으로, 먼저 엔터프라이즈 시스템에서의 이벤트 처리 아키텍처를 제안하고, 제안된 아키텍처에 적합한 이벤트 메타모델을 정의한다. 정의된 메타모델을 기초로 다양하고 진보된 이벤트 연산자와 복합 이벤트 패턴, 그리고 키(key) 등 이벤트 처리 언어를 구성하는 요소의 문법과 의미를 제안한다. 또한, 보다 정교한 이벤트 분석을 위한 이벤트 컨텍스트 매커니즘을 제안한다. 마지막으로 응용사례를 통하여 본 연구의 적용 가능성을 보여주고, 다른 이벤트 모델과의 비교를 통해 본 이벤트 모델의 장점을 제시한다.

• 한국시뮬레이션학회논문지
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• 제4권2호
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• pp.1-16
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• 1995

The performance of a computer system depends on the system architecture and workload, and the high performance required in many applications can be achieved by the scalability of the system architecture and workload. This paper presents scalable workload, a performance metric of scalable speedup and hierarchical modeling for the scalable computer system as well as the development of the object-oriented simulator spmplC++ Which is an advanced C++ version of the discrete event-driven simulation environment smplE. In addition, this paper presents two examples of applying scalable speedup, hierarchical modeling and simulator smplC++ to analyze the performance effect of the sclcbility in a multiprocessor system and a network-based client/server system.

• Journal of Advanced Marine Engineering and Technology
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• 제30권2호
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• pp.247-252
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• 2006

Almost ship monitoring systems are event driven alarm system which warn only when the measurement value is over or under set point. These kinds of system cannot warn until signal is growing to abnormal state that the signal is over or under the set point. therefore cannot play a role for preventive maintenance system. This paper proposes fault diagnosis method which is able to diagnose and forecast the fault from present operating condition by analyzing monitored signals with present ship monitoring system without any additional sensors. By analyzing the data with high correlation coefficient(CC), correlation level of interactive data can be defined. Knowledge base of abnormal detection can be built by referring level of CC(Fault Detection CC. FDCC) to detect abnormal data among monitored data from monitoring system and knowledge base of diagnosis built by referring CC among interactive data for related machine each other to diagnose fault part.

• 한국마린엔지니어링학회:학술대회논문집
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• 한국마린엔지니어링학회 2005년도 전기학술대회논문집
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• pp.281-286
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• 2005

Almost ship monitoring systems are event driven alarm system which warn only when the measurement value is over or under set point. These kinds of system cannot warn while signal is growing to abnormal state until the signal is over or under the set point and cannot play a role for preventive maintenance system. This paper proposes fault diagnosis method which is able to diagnose and forecast the fault from present operating condition by analyzing monitored signals with present ship monitoring system without additional sensors. By analyzing this data having high correlation coefficient(CC), correlation level of interactive data can be understood. Knowledge base of abnormal detection can be built by referring level of CC(Fault Detection CC, FDCC) to detect abnormal data among monitored data from monitoring system and knowledge base of diagnosis built by referring CC among interactive data for related machine each other to diagnose fault part.

• 전자공학회논문지A
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• 제29A권9호
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• pp.76-84
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• 1992

The DSP silicon compiler consists of language compiler, module generator, placement tool, router, layout generation tools, and simulator. In this paper, The language compiler, the module generator, placement tool, and simulator were developed and provided for the system designer. The language compiler translates the designer's system description language into the intermediate form file. The intermediate form file expresses the interconnections and specifications of the cells in the cell library. The simulator was developed and provided for the behavioral verification of the DSP system. For its implementation, the event-driven technique and the C$^{++}$ task library was used. The module generator was developed for the layout of the verified DSP system, and generates the functional block to be used in the DSP chip. And then the placement tool determines the appropriate positions of the cells in the DSP chip. In this paper, the placement tool was implemented by Min-Cut and Simulated Annealing algorithm. The placement process can be controlled by the several conditions input by the system designer.

• 한국경영과학회지
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• 제20권2호
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• pp.159-178
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• 1995

Supervisory control is an approach based on formal language. it is used to model and control discrete event systems in which each discrete event process is represented as an automation. A supervisor is a generator that switches control patterns in such a way that a given discrete evenet process behaves in obedience to various constraints. A flexible manufacturing cell (FMC) is one of discrete evenet systems. Functions necessary for the operation of an FMC are characterized by operational components and informational compoments. The operational components can be modeled using the finite state machines and the informational components can be modeled using the abstract formalism which describes supporting operations of the cell controller. In this paper, we addressed function required for FMC control specification, software engineering aspects on FMC control based on supervisory control, a concept of event queue for resolving synchronization problem, and complexity reduction. Based on the mathematical model of an FMC. we synthesized the controller by integrating a supervisor for FMC with control specification that specifies event-driven operation of the cell controller. The proposed control scheme is stable mathematically so that the system always behaves on a controlled way even under the existence of uncontrollable events. Furthermore, using an event queue concept, we can solve a synchronization problem caused by the violation of instantaneity assumption of supervisory control theory in real life situation. And also, we can propotype a control software rapidly due to the modularity of the proposed control scheme.

• 인터넷정보학회논문지
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• 제24권5호
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• pp.51-66
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• 2023

본 논문에서는 비즈니스 프로세스 모델의 생명주기관리를 지원하는 대표적인 지식발견기술인 프로세스 마이닝과 지식개선기술인 프로세스 리엔지니어링 접근방법을 기반으로 하는 새로운 유형의 프로세스 발견 프레임워크를 제안한다. 또한, 제안된 프레임워크를 기반으로 하는 프로세스 마이닝 시스템을 개발하고, 이를 통한 실험적 검증을 수행한다. 실험적 효과검증에 적용된 프로세스 실행 이벤트 로그를 특별히 프로세스 빅-로그(Process BIG-Logs)라고 정의하고, 분산 비즈니스 프로세스 관리 시스템의 로깅메커니즘과 연계된 조각-실행로그이력들을 클러스터링하는 전처리과정을 거친 마이닝의 입력데이터세트로 활용한다. 결과적으로, 본 논문에서는 구조적 정보제어넷기반 프로세스 마이닝 알고리즘인 ρ-알고리즘을 개선한 제어경로기반 프로세스 그룹 발견 알고리즘과 프레임워크를 설계 및 구현하고, 구현된 시스템을 이용하여 제안한 알고리즘과 프레임워크의 정확성을 실험적으로 검증한다.

• 한국시뮬레이션학회논문지
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• 제1권1호
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• pp.87-102
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• 1992

This paper presents the development of event-driven system level simulation tool SMPLE(Smpl Extende, an extention fo smpl) and its application to the performance analysis of multiprocessor computer systems. Because of its data structure, it is very difficult to change, expand or add new functions to simulation language smpl implemented by MacDougall. In SMPLE, we change data structure with structure and pointer, add new functions, and enable dynamic memory management. Using new data structure, facilities, and functions added in SMPLE, we simulate job processing of a shared bus multiprocessor system with autonomous hierarchical I/O subsystem. We set system performance contribution of subsystems and units. The impact of disk I/O on system performance is evaluated under vairous conditions of number of processors, processing power, memory access time and disk seek time.