• ETRI Journal
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• v.27 no.6
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• pp.810-813
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• 2005

This letter presents an analytical framework for a performance analysis of the imperfect direct-sequence code division multiple access (DS-CDMA) closed-loop power control (CLPC) loop with loop delay, channel estimation error, and power control command bit error as the parameters under a Rayleigh flat fading environment. The proposed model is verified through a comparison between analytical results and simulation ones.

• Journal of Institute of Control, Robotics and Systems
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• v.11 no.7
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• pp.644-650
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• 2005

The expected positioning accuracies of civil users utilizing modernized GPS and Galileo are derived using the error analysis in this paper. Since, in general, the performance of DLL, PLL and FLL is proportional to chip lengths and wavelengths, the positioning accuracies from various measurements of modernized GPS and Galileo are derived as function of chip length and wavelength. These results are compared with that from GPS Ll measurement. In absolute positioning, compared to GPS C/A code only case, more than 17 times performance improvement is expected when all civil code signals of modernized GPS and Galileo (L1, L2, L5, E1, E5A and E5B) are used. In relative positioning, compared to GPS L1 carrier phase only case, more than 2 times performance improvement is expected when all civil signals of modernized GPS and Calileo are used. Furthermore, the relationship between GDOP and RGDOP in single frequency case is expanded to general case where multiple frequencies and both code and carrier phase measurements are used.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.11-14
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• 1998

This paper introuces a new efficient method of synchronization acquisition which is the most important element in DS-CDMA system using the phase offset of binary code. This approach uses the binary code function which can easily estimate the phase offset from the received spreading waveforms which respect to the receiver-stored replica of the spreading code. This paper proposes the initial acquisition model with repeat error control device that is good for perfomance. The hardware is implemented by TMS320c30

• ETRI Journal
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• v.32 no.4
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• pp.588-595
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• 2010

This paper proposes encoding and decoding for nonlinear product codes and investigates the performance of nonlinear product codes. The proposed nonlinear product codes are constructed as N-dimensional product codes where the constituent codes are nonlinear binary codes derived from the linear codes over higher order alphabets, for example, Preparata or Kerdock codes. The performance and the complexity of the proposed construction are evaluated using the well-known nonlinear Nordstrom-Robinson code, which is presented in the generalized array code format with a low complexity trellis. The proposed construction shows the additional coding gain, reduced error floor, and lower implementation complexity. The (64, 24, 12) nonlinear binary product code has an effective gain of about 2.5 dB and 1 dB gain at a BER of $10^{-6}$ when compared to the (64, 15, 16) linear product code and the (64, 24, 10) linear product code, respectively. The (256, 64, 36) nonlinear binary product code composed of two Nordstrom-Robinson codes has an effective gain of about 0.7 dB at a BER of $10^{-5}$ when compared to the (256, 64, 25) linear product code composed of two (16, 8, 5) quasi-cyclic codes.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.55 no.9
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• pp.485-490
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• 2006

According to the computerization of railway signaling systems, the interface link between the signaling systems has been replaced by the digital communication channel. At the same time, the importance of the communication link is more pronounced than before. In this paper, new Network-based protocol between railway signaling and SCADA (Supervisory Control and Data Acquisition system) has designed and the overview of designed protocol is briefly represented. And also this paper addresses analysis of newly designed train control systems. Fame error rates of the data transmissions are calculated and compared for the two cases that the CTC (Centralized Traffic Control)/SCADA has an extra data transmission error control (CRC16) besides the inherent error control of the Ethernet and that the CTC/SCADA has no extra data transmission error control. With simulation results it has been verified that the additional error control code contributes to lowering the frame error rate. It will be expected to increase the safety, reliability and efficiency of maintenance of the signaling systems by using the designed protocol for railway signaling system.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.25 no.1
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• pp.1-8
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• 2011

In this paper, the method to calculate chromaticity coordinate from spectral power distribution of LED is presented. Also, inverse tri-stimulus algorithm to find mixed luminance of red, green, blue LED from targeted luminance and chromaticity coordinate is proposed. Besides, digital light color control system of LED lamp applied this algorithm has been developed. In experiments, each chromaticity coordinate of red, green, blue LED calculated from this algorithm has relative percentage error of few % to measured values. Digital code is drawn from inverse tri-stimulus algorithm, and measured values of luminance and chromaticity coordinate of LED lamp digitally controlled by this code also have relative percentage error within a few % to targeted luminance and chromaticity coordinate.

• ETRI Journal
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• v.46 no.3
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• pp.485-500
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• 2024

A hardware architecture is presented to decode (N, K) polar codes based on a low-density parity-check code-like decoding method. By applying suitable pruning techniques to the dense graph of the polar code, the decoder architectures are optimized using fewer check nodes (CN) and variable nodes (VN). Pipelining is introduced in the CN and VN architectures, reducing the critical path delay. Latency is reduced further by a fully parallelized, single-stage architecture compared with the log N stages in the conventional belief propagation (BP) decoder. The designed decoder for short-to-intermediate code lengths was implemented using the Virtex-7 field-programmable gate array (FPGA). It achieved a throughput of 2.44 Gbps, which is four times and 1.4 times higher than those of the fast-simplified successive cancellation and combinational decoders, respectively. The proposed decoder for the (1024, 512) polar code yielded a negligible bit error rate of 10^-4 at 2.7 E_b/N_o (dB). It converged faster than the BP decoding scheme on a dense parity-check matrix. Moreover, the proposed decoder is also implemented using the Xilinx ultra-scale FPGA and verified with the fifth generation new radio physical downlink control channel specification. The superior error-correcting performance and better hardware efficiency makes our decoder a suitable alternative to the successive cancellation list decoders used in 5G wireless communication.

• The Transactions of the Korea Information Processing Society
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• v.2 no.5
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• pp.677-690
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• 1995

In this paper, we propose the high efficiency data compression capable of error control using block-sorting, move to front(MTF) and arithmetic code with variable length in to fixed out. First, the substring with is parsed into length N is shifted one by one symbol. The cyclic shifted rows are sorted in lexicographical order. Second, the MTF technique is applied to get the reference of locality in the sorted substring. Then the preprocessed sequence is coded using VF(variable to fixed) arithmetic code which can be limited the error propagation in one codeword. The key point is how to split the fixed length codeword in proportion to symbol probabilities in VF arithmetic code. We develop the new VF arithmetic coding that split completely the codeword set for arbitrary source alphabet. In addition to, an extended representation for symbol probability is designed by using recursive Gray conversion. The performance of proposed method is compared with other well-known source coding methods with respect to entropy, compression ratio and coding times.

• Transactions of The Korea Fluid Power Systems Society
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• v.8 no.3
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• pp.1-7
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• 2011

As the technologies of electronic device have advanced these days, most of mechanical systems are designed with electronic control unit to take advantage of control parameter adaption to operating conditions and firmware flexibilities as well. On-board diagnosis, which detects the system malfunction and identifies potential source of error with its own diagnostic criteria, and fail-safe that can switch the mode of operation in view of recognized error characteristics enables easy maintenance and troubleshooting as well as system protection. This paper dealt with the development of diagnosis and fail-safe function for proportional flow control valve. All type of errors related to valve control system components are investigated and assigned to a specific hexadecimal codes. Cumulative error detection algorithm is applied in order for the sensitivity and reliability to be appropriate. Embedded simulator which runs simultaneously with system program provides the virtual error simulation environment for expeditious development of error detection algorithm. The diagnosis function was verified both with solenoid valve and embedded simulator test and it will enhance the valve control system monitoring function.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.11a
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• pp.605-609
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• 2002

Reliable multicast data transmission in a 1:N environment needs more sophisticated error control mechanism than that of in 1:1 environment due to ACK implosion and duplicated retransmission. Although there have been many related research on error control in reliable multicast, real implemented protocols are rare. As one of the reliable multicast transport protocols, ECTP is selected as an international standard reliable multicast protocol by ITU-T and ISO and implemented on RedHat 7.2 machine by us. In this paper, we evaluate the performance of the error control mechanism in the respect of throughput and generated control packet numbers with a real implementation code. From the results, it is concluded that the suitable values of error control parameters can be obtained from the local group size and network environments.