• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.9A
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• pp.868-877
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• 2006

Sensor network applications need synchronized time to the highest degree such as object tracking, consistent state updates, duplicate detection, and temporal order delivery. In addition, reliability issues and fault tolerance in sophisticated sensor networks have become a critical area of research today. In this paper, we proposed a fault tolerant clock management scheme in sensor networks considering two cases of fault model such as network faults and clock faults. The proposed scheme restricts the propagation of synchronization error when there are clock faults of nodes such as rapid fluctuation, severe changes in drift rate, and so on. In addition, it handles topology changes. Simulation results show that the proposed method has about $1.5{\sim}2.0$ times better performance than TPSN in the presence of faults.

• Electronics and Telecommunications Trends
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• v.35 no.2
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• pp.79-88
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• 2020

Quantum computing is regarded as one of the revolutionary computing technologies, and has attracted considerable attention in various fields, such as finance, chemistry, and medicine. One of the promising candidates to realize fault tolerant quantum computing is quantum dot qubits, due to their expectation of high scalability. In this study, we briefly introduce the international tendencies for quantum dot quantum computing. First, the current status of quantum dot gate operations is summarized. In most systems, over 99% of single qubit gate operation is realized, and controlled-not and controlled-phase gates as 2-qubit entangling gates are demonstrated in quantum dots. Second, several approaches to expand the number of qubits are introduced, such as 1D and 2D arrays and long-range interaction. Finally, the current quantum dot systems are evaluated for conducting quantum computing in terms of their number of qubits and gate accuracies. Quantum dot quantum computing is expected to implement scalable quantum computing. In the noisy intermediate-scale quantum era, quantum computing will expand its applications, enabling upcoming questions such as a fault-tolerant quantum computing architecture and error correction scheme to be addressed.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.55 no.3
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• pp.91-97
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• 2006

A major difficulty with the practical application of the multiple observer based IFDI schemes is the computational burden of the residual generation. In this paper, a new residual generator that employs function observers is proposed to reduce the computational burden, and the design methods of the IFDIS, equipped with the residual generator, are presented. The function observers employed in the residual generator can be considered as a dual of the unknown input (function) observer And it can be designed to estimate the measurement errors that are due to sensor faults. The error estimates are further processed to generate the residuals by which reliable fault detection/isolation result car be obtained. The proposed scheme is more useful, in real-time application, than any other multiple state observer based IFDISs. It can be effectively applied to fault tolerant control because the failure effects can be compensated by the use of the estimates of measurement errors. The proposed IFDI scheme is applied to an inverted pendulum control system for the IFDI of failed sensor and fault compensation.

• Journal of Drive and Control
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• v.16 no.3
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• pp.23-32
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• 2019

This study proposed a fault tolerant control algorithm for electro-hydraulic brake systems where permanent magnet synchronous motor (PMSM) drive is adopted to boost the braking pressure. To cope with motor position sensor faults in the PMSM drive, a braking pressure controller based on an open-loop speed control method for the PMSM was proposed. The magnitude of the current vector was determined from the target braking pressure, and motor rotational speed was derived from the pressure control error to build up the braking pressure. The position offset of the pump piston resulting from a leak in the hydraulic system is also compensated for using the open-loop speed control by moving the piston backward until it is blocked at the end of stroke position. The performance and stability of the proposed controller were experimentally verified. According to the results, the control algorithm can be utilized as an effective means of degraded control for electro-hydraulic brake systems in the case that a motor position sensor fault occurs.

• Current Optics and Photonics
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• v.7 no.4
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• pp.345-353
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• 2023

We propose a turbulence-tolerant Manchester on-off keying (M-OOK) transmission for free-space optical (FSO) communication. At the transmitter end, a M-OOK signal featuring a spectrum with low-frequency components absent is modulated and transmitted into a turbulent channel. At the receiver end, a low-pass filter (LPF) -based adaptive-threshold decision (ATD) with LPF-extracted channel-state information (CSI) and a high-pass filter (HPF)-based fixed-threshold decision (FTD) are employed to compensate for the effects of turbulence, owing to the low-frequency spectral characteristics of the turbulent channel. The performance of LPF-based ATD and HPF-based FTD are evaluated for various cutoff frequencies for the LPF and HPF. Besides, the proposed M-OOK transmission is compared to conventional non-return-to-zero OOK (NRZ-OOK) for different data rates. The proposed technique is verified in simulation. The simulation results show that the proposed M-OOK detection with optimized cutoff frequencies of LPF and HPF has better bit-error-rate (BER) performance compared to NRZ-OOK, and it is close to the theoretical ATD with the knowledge of precise CSI under various degrees of turbulence effects.

• Journal of IKEEE
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• v.26 no.4
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• pp.628-632
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• 2022

In this paper, a triple-core delayed lock-step processor is proposed for automotive applications. It performs same operations in three different cores independently, and votes their results to get final values. Therefore its operations are safe even if errors occur in one core. Its three cores operate in a delayed manner to prevent simultaneous errors in multiple cores due to radiative ray or electromagnetic wave. When an error occurs in main core connected to the memory, wrong values can be stored in the memory, so the proposed processor performs memory rollback to restore correct values. Simulation results show that the proposed processor successfully compensates various errors.

• The Transactions of the Korea Information Processing Society
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• v.6 no.8
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• pp.2233-2244
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• 1999

It is essential to guarantee high reliability of embedded real-time systems since the failure of such systems may result in large financial damage or threaten human life. Though many researches have devoted to fault tolerant mechanisms, most of them are object-level fault tolerant mechanisms that can detect errors occurred in a single object and treat the errors in object-level. As embedded real-time systems become more complex and larger, there exist faults that cannot be detected by or tolerated with object-level fault tolerance. Hence, system-level fault tolerance is needed. System-level fault tolerance examines the status of a system whether the system is normal or not by analyzing the status of objects. When an error is detected it should be capable of locating the fault and performing an appropriate recovery and reconfiguration action. In this paper, we propose RobustRTO(Robust Real-Time Object) that provides object-level fault tolerance capability and RMO(Region Monitor real-time Object) that offers system-level fault tolerance capability. Then we show how highly dependable fault tolerant systems can be modeled by RobustRTO and RMO. The model is presented based on real-time objects.

• Journal of Computing Science and Engineering
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• v.5 no.2
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• pp.121-130
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• 2011

Recent research indicates that transient errors will increasingly become a critical concern in microprocessor design. As embedded processors are widely used in reliability-critical or noisy environments, it is necessary to develop cost-effective fault-tolerant techniques to protect processors against transient errors. The register file is one of the critical components that can significantly affect microprocessor system reliability, since registers are typically accessed very frequently, and transient errors in registers can be easily propagated to functional units or the memory system, leading to silent data error (SDC) or system crash. This paper focuses on investigating the impact of register file soft errors on system reliability and developing cost-effective techniques to improve the register file immunity to soft errors. This paper proposes the register vulnerability factor (RVF) concept to characterize the probability that register transient errors can escape the register file and thus potentially affect system reliability. We propose an approach to compute the RVF based on register access patterns. In this paper, we also propose two compiler-directed techniques and a hybrid approach to improve register file reliability cost-effectively by lowering the RVF value. Our experiments indicate that on average, RVF can be reduced to 9.1% and 9.5% by the hyperblock-based instruction re-scheduling and the reliability-oriented register assignment respectively, which can potentially lower the reliability cost significantly, without sacrificing the register value integrity.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.15 no.5
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• pp.1829-1846
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• 2021

Transient faults occur in computation units of a processor, which can cause control flow errors (CFEs) and compromise system reliability. The software-based methods perform illegal control flow detection by inserting redundant instructions and monitoring signature. However, the existing methods not only have drawbacks in terms of performance overhead, but also lack of configurability. We propose a configurable approach CCFCA for detecting CFEs. The configurability of CCFCA is implemented by analyzing the criticality of each region and tuning the detecting granularity. For critical regions, program blocks are divided according to space-time overhead and reliability constraints, so that protection intensity can be configured flexibly. For other regions, signature detection algorithms are only used in the first basic block and last basic block. This helps to improve the fault-tolerant efficiency of the CCFCA. At the same time, CCFCA also has the function of solving confusion and instruction self-detection. Our experimental results show that CCFCA incurs only 10.61% performance overhead on average for several C benchmark program and the average undetected error rate is only 9.29%. CCFCA has high error coverage and low overhead compared with similar algorithms. This helps to meet different cost requirements and reliability requirements.

• Journal of the Optical Society of Korea
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• v.20 no.2
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• pp.223-227
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• 2016

The impact of optical receiver configuration on in-band crosstalk-induced penalty has been investigated in both theoretical and experimental analyses, for differential phase-shift keying (DPSK) and differential quadrature phase-shift keying (DQPSK) signals. Previously it has been shown that DPSK signals are ~6 dB more tolerant to in-band crosstalk than on-off keying (OOK) signals. However, we find that the tolerance difference between the two signals is reduced to ~3 dB when the decision threshold of the receiver is optimized to minimize the bit-error rate for each signal. Then we derive simple equations for the in-band crosstalk-induced penalty in DPSK and DQPSK signals with two different optical receiver configurations: balanced and single-ended direct-detection receivers. We confirm that the penalties obtained from our simple equations agree well with the measured results.