• Journal of the Korean Institute of Telematics and Electronics S
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• v.34S no.2
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• pp.1-10
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• 1997

In this paper, an improved lower bound on the burst-error correcting capability of th ecyclic product code is presented and through the analysis of this new bound clustered cyclic product (CCP abbr.)code is proposed. The CCP code, to improve the burst-error correcting capability, combines the idea of clustering and the transmission method of cyclic product code. That is, a cluster which is defined in this paper as a group of consecutive code symbols is employed as a new transmission unit to the code array transmission of cyclic product code. the burst-error correcting capability of the CCP code is improved without a loss in the random-error correcting capability and performance comparison in the digital video camera records (DVCR) system shows the superiority of the proposed CCP code over conventional product codes.

• The Journal of the Korea institute of electronic communication sciences
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• v.14 no.5
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• pp.907-916
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• 2019

In this paper, we propose a new five-qubit multiple bit flip code that can completely protect the target qubit from all multiple bit flip errors using only CNOT gates. The proposed multiple bit flip codes can be easily extended to multiple phase flip codes by embedding Hadamard gate pairs in the root error section as in conventional single bit flip code. The multiple bit flip code and multiple phase flip code in this paper share the state vector error information by four auxiliary qubits. These four-qubit state vectors reflect the characteristic that all the multiple flip errors with Pauli X and Z corrections commonly include a specific root error. Using this feature, this paper shows that low-cost implementation is possible despite the QECC design for multiple-flip error correction by batch processing the detection and correction of Pauli X and Z root errors with only three CNOT gates. The five-qubit multiple bit flip code and multiple phase flip code proposed in this paper have 100% error correction rate and 50% error discrimination rate. All QECCs presented in this paper were verified using QCAD simulator.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.3
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• pp.601-606
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• 2017

SRAM-based FPGAs mainly used to develop and implement high-performance circuits have SRAM-type configuration memory. Soft errors in memory devices are the main threat from a reliability point of view. Soft errors occurring in the configuration memory of FPGAs cause FPGAs to malfunction. SEM(Soft Error Mitigation) Controllers offered by Xilinx can mitigate the influence of soft errors in configuration memory. SEM Controllers use ECC(Error Correction Code) and CRC(Cyclic Redundancy Code) which are placed around the configuration memory to detect and correct the errors. The correction is done through a partial reconfiguration process. This paper presents the availability analysis of SRAM-based FPGAs against soft errors under the protection of SEM Controllers. Availability functions were derived and compared according to the correction capability of SEM Controllers of several different families of FPGAs. The result may help select an SRAM-based FPGA part and estimate the availability of FPGAs running in an environment where soft errors occur.

• Journal of the Korean Society for Precision Engineering
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• v.15 no.1
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• pp.69-77
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• 1998

Linear displacement accuracy is one of the most important factors that determine machine tool accuracy The laser interferometer has been usually recommended for the measurement of linear displacement accuracy. In this paper, microcomputer aided measurement and compensation system has been developed for the pitch error in a CNC machine tool. For accurate pitch error calculation. the analysis code for the pitch error has been also implemented according to the international standards (ISO). The PC based automatic compensation system for the pitch error is also implemented. A new algorithm for calculating optimum value for pitch error compensation is proposed, minimizing the deviation at each target points. The development system has been applied to a practical CNC maching center and the performance has been demonstrated.

• Journal of the Korean Institute of Intelligent Systems
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• v.18 no.5
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• pp.611-616
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• 2008

Error correcting codes (ECCs) are commonly used to protect against the soft errors. Single error correcting and double error detecting (SEC-DED) codes are generally used for this purpose. The proposed approach in this paper selectively reduced power consumption, delay, and area in single-error correcting, double error-detecting checker circuits that perform memory error correction. The multi-objective genetic algorithm is employed to solve the non -linear optimization problem. The proposed method allows that user can choose one of different non-dominated solutions depending on which consideration is important among them. Because we use multi-objective genetic algorithm, we can find various dominated solutions. Therefore, we can choose the ECC according to the important factor of the power, delay and area. The method is applied to odd-column weight Hsiao code which is well- known ECC code and experiments were performed to show the performance of the proposed method.

• ETRI Journal
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• v.30 no.6
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• pp.799-806
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• 2008

In this paper, a new design for an error correcting code (ECC) is proposed. The design is aimed to build an ECC circuitry with minimal power consumption. The genetic algorithm equipped with the symbiotic mechanism is used to design a power-efficient ECC which provides single-error correction and double-error detection (SEC-DED). We formulate the selection of the parity check matrix into a collection of individual and specialized optimization problems and propose a symbiotic evolution method to search for an ECC with minimal power consumption. Finally, we conduct simulations to demonstrate the effectiveness of the proposed method.

• Proceedings of the KIEE Conference
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• 2001.07d
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• pp.2496-2498
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• 2001

광 디스크 channel상에서 RSPC의 error correction capability를 확률적인 계산 방법으로 계산하는 데는 많은 어려움이 있다. 그 이유는 바로 광 디스크 channel이 burst error channel이기 때문인데, 이 burst error를 어떻게 다루는 가에 따라 그 error correction capability는 사뭇 달라진다. 이 논문에서는 Sony의 dust error distribution[1] 아래에서 4-state Morkov Chain[2]로 modeling하고 그 결과를 가지고 burst error를 channel의 특성과 ECC format의 특성에 맞게 제어할 수 있는 확률적인 계산방법을 소개하고 그것을 simulation하고자 한다.

• Journal of Korea Society of Industrial Information Systems
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• v.22 no.3
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• pp.19-26
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• 2017

In this paper, a Linear Error Correction Code, Which is Applicable to Next Generation Wireless Communication System Technology, is Constructed Based on Performance Comparison and Transmission Based on the Premise of High Performance Mobile Rate Enhancement System. This is Because Data Rates are Becoming an Important Issue in Reed-Solomon Codes and Linear Error Code (LDPC) Used in the Physical Layer of Digital Communication and Broadcasting Technologies. Therefore, this paper Simulates the Performance of Reed - Solomon Code and LDPC Applied to Mobile Broadcasting DVB (Digital Video Broadcasting) System and Mobile Broadcasting in Digital Communication and Broadcasting, At this time, Technical Aspects of the Transmission Efficiency and Performance of the LDPC Replacing the Existing Reed-Solomon Code have been Verified from the Viewpoint of Efficiency.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.10
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• pp.2247-2255
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• 2015

In very shallow water acoustic communication channel, underwater acoustic (UWA) communication signal is observed as frequency selective fading signal due to time-varying multipath. This induces a time and frequency dependent inter-symbol-interference (ISI) and degrades the UWA system performance. There is no study about how the performances of the error correction codes are related to a multipath fading statistics in very shallow water. In this study, the characteristics of very shallow water multipath fading channel is analyzed and the performances of two different forward error correction (FEC) codes are compared. The convolution code (CC) and Reed-Solomon (RS) code are adopted. Sea experimental results show that RS code is better choice than CC in frequency selective channel with fading.

• Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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• v.4 no.2
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• pp.369-378
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• 2014

The Reed-Muller code is one of the efficient algorithms for multiple bit error correction, however, its high-computation requirement inherent in the decoding process prohibits its use in practical applications. To solve this problem, this paper proposes a graphics processing unit (GPU)-based parallel error control approach using Reed-Muller R(r, m) coding for real-time wireless communication systems. GPU offers a high-throughput parallel computing platform that can achieve the desired high-performance decoding by exploiting massive parallelism inherent in the algorithm. In addition, we compare the performance of the GPU-based approach with the equivalent sequential approach that runs on the traditional CPU. The experimental results indicate that the proposed GPU-based approach exceedingly outperforms the sequential approach in terms of execution time, yielding over 70× speedup.