• 한국재료학회지
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• 제22권4호
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• pp.190-194
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• 2012

The formation of high-quality polycrystalline silicon (poly-Si) on relatively low cost substrate has been an important issue in the development of thin film solar cells. Poly-Si seed layers were fabricated by an inverse aluminum-induced crystallization (I-AIC) process and the properties of the resulting layer were characterized. The I-AIC process has an advantage of being able to continue the epitaxial growth without an Al layer removing process. An amorphous Si precursor layer was deposited on Corning glass substrates by RF magnetron sputtering system with Ar plasma. Then, Al thin film was deposited by thermal evaporation. An $SiO_2$ diffusion barrier layer was formed between Si and Al layers to control the surface orientation of seed layer. The crystallinity of the poly-Si seed layer was analyzed by Raman spectroscopy and x-ray diffraction (XRD). The grain size and orientation of the poly-Si seed layer were determined by electron back scattering diffraction (EBSD) method. The prepared poly-Si seed layer showed high volume fraction of crystalline Si and <100> orientation. The diffusion barrier layer and processing temperature significantly affected the grain size and orientation of the poly Si seed layer. The shorter oxidation time and lower processing temperature led to a better orientation of the poly-Si seed layer. This study presents the formation mechanism of a poly seed layer by inverse aluminum-induced crystallization.

• 한국진공학회지
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• 제8권3B호
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• pp.322-326
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• 1999

We have investigated the growing process of a silicon film on the $CeO_2/Si$ surface. The silicon was deposited by using electron beam deposition method. The $CeO_2$(111) film was grown on a (111)-oriented silicon substrate at $700^{\circ}C$ at oxygen [partial pressure of $5\times10^{-5}$ Torr. To investigate the condition of epitaxial growth of si films on the $CeO_2/Si$ substrate, we deposited Si at various temperature니 The overlayer silicon was characterized by using x-ray diffraction(XRD). double crystal x-ray diffraction (DCXRD), and transmission electron microscopy (TEM). At temperature higher than $690^{\circ}C$, $CeO_2$ layer was observed at the $CeO_2/Si$ interface, which was formed by chemical reaction with silicon and oxygen dissociated from $CeO_2$. When silicon was deposited on the $CeO_2/Si$ at $620^{\circ}C$, silicon grew epitaxially along the (111)-direction.

• Nuclear Engineering and Technology
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• 제55권1호
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• pp.201-208
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• 2023

The dependence of the electrical characteristics on the fast neutron fluence of an epitaxial 4H-SiC Schottky barrier diode (SBD) was investigated. The 30 MeV cyclotron was used for fast neutron irradiation. The neutron fluences evaluated through Monte Carlo simulation were in the 2.7 × 10¹¹ to 1.45 × 10¹³ neutrons/cm² range. Current-voltage and capacitance-voltage measurements were performed to characterize the samples by extracting the parameters of the irradiated SBDs. Neutron-induced defects in the epitaxial layer were identified and quantified using a deep-level transient spectroscopy measurement system developed at the Korea Atomic Energy Research Institute. As the neutron fluence increased from 2.7 × 10¹¹ to 1.45 × 10¹³ neutrons/cm², the concentration of the Z_1/2 defects increased by approximately 20 times. The maximum defect concentration was estimated as 1.5 × 10¹⁴ cm^-3 at a neutron fluence of 1.45 × 10¹³ neutrons/cm².

• 센서학회지
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• 제3권1호
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• pp.5-11
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• 1994

본 논문은 실리콘기판 직접접합기술과 에피택샬 성장법으로 각각 형성한 SOI구조, 즉 Si/$SiO_{2}$/Si 및 Si/$Al_{2}O_{3}$/Si 상에 제작한 압저항형 압력센서의 특성을 기술한다. SOI구조의 절연층을 압저항의 유전체 분리막으로 이용한 압력센서는 $300^{\circ}C$ 까지 사용 가능했다. SOI구조의 절연층을 박막 실리콘 다아어프램 형성시 에칭 중지막으로 이용한 경우, 제작된 압력센서의 200개 소자들에 대한 압력감도의 변화는 ${\pm}2.3%$ 이내로 제어 가능했다. 더구나 실리콘 기판 직접접합기술과 에피택샬 성장법의 결합으로 형성한 더불 SOI구조($Si/Al_{2}O_{3}/Si/SiO_{2}/Si$)상에 제작된 압력센서는 고온분위기에서 사용 가능할 뿐만 아니라 고분해 능력을 갖는 특성을 보였다.

• 한국진공학회지
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• 제16권5호
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• pp.343-347
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• 2007

Glass disk상에 대향 타겟식 스퍼터링(Facing Target Sputtering) 방식을 이용하여 $0.1\;{\AA}/s$의 낮은 증착속도로 증착시킬 경우 b.c.c. (100)면 우선배향성을 확인하였으며, 그 위에 Pt박막을 증착시킨 경우 hetero-epitaxial 성장에 의해 Pt박막이(111)의 조밀면이 아닌 (100)면이 우선배향 되었다. 이렇게 형성된 Fe (100)/Pt (100) 이층막(두께 각 3 nm)을 $600\;^{\circ}C$ 수소분위기에서 열처리함에 의해 막전체에 걸쳐서 f.c.t. (00n)면을 형성시키는 데 성공하고, 또한 Fe (100)면 상에 Pt 박막을 증착시키는 동안 열처리를 하고 증착 이후 수소분위기에서 열처리함에 의해 열처리 시간 및 온도를 크게 낮출 수 있음을 확인하였다.

• 한국자기학회지
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• 제2권1호
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• pp.15-21
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• 1992

침상형의 ${\gamma}-Fe_{2}O_{3}$ 입자를 $Co^{+2}/Fe^{+2}$의 몰비가 0.5인 2가 금속혼합용액을 함유하는 알카리성 용액에서 $90^{\circ}C$로 가열하였다. 코발트 함량이 증가함에 따라 생성물의 보자력은 거의 직선적으로 증가하였으며 비표면적은 감소하였다. 코발트 훼라이트는 ${\gamma}-Fe_{2}O_{3}$ 결정 표면상에 에피탁시얼하게 성장되며, 보자력의 증가는 피착층인 코발트 훼라이 트의 결정 자기이방성에 기인하는 것으로 사료된다. 당량비 2이상에서 우수한 자기적 특성을 기대할 수 있 었으며 반응공정도 코발트 훼라이트 에피탁시얼 산화철의 보자력 특성에 영향을 미친다. $Co-{\gamma}-Fe_{2}O_{3}$의 온도 및 경시변화에 대한 안정성은 피착층 조성에 의해 크게 지배된다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제38회 동계학술대회 초록집
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• pp.9-10
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• 2010

Since the discovery of graphene by mechanical exfoliation from graphite[1], various fabrication methods are available today such as chemical exfoliation, epitaxial graphene on SiC substrates, etc. In view of industrialization, the mechanical exfoliation method may not be an option. Epitaxial graphene on SiC substrates, in this respect, is by far more practical because the method consists of conventional thermal treatments familiar to semiconductor industry. Still, the use of the SiC substrate itself, and hence the incompatibility with the Si technology, lessens the importance of this technology in its future industrialization. In this context, we have tackled the problem of forming graphene on Si substrates (GOS). Our strategy is to form an ultrathin (~80 nm) SiC layer on top of a Si substrate, and to graphitize the top SiC layers by a vacuum annealing. We have actually succeeded in forming the GOS structure [2,3,4]. Raman-scattering microscopy indicates presence of few-layer graphene (FLG) formed on our annealed SiC/Si heterostructure, with the G ($1580\;cm^{-1}$) and the G'($2700\;cm^{-1}$) bands, both related to ideal graphene, clearly observed. Presence of the D ($1350\;cm^{-1}$) band indicates presence of defects in our GOS films, whose elimination remains as a challenge in the future. To obtain qualified graphene films on Si substrate, formation of qualified SiC films is crucial in the first place, and is achieved by tuning the growth parameters into a process window[5]. With a potential for forming graphene films on large-scale Si wafers, GOS is a powerful candidate as a key technology in bringing graphene into silicon technology.

• 한국재료학회지
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• 제34권2호
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• pp.111-115
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• 2024

Silicon carbide (SiC) has emerged as a promising material for next-generation power semiconductor materials, due to its high thermal conductivity and high critical electric field (~3 MV/cm) with a wide bandgap of 3.3 eV. This permits SiC devices to operate at lower on-resistance and higher breakdown voltage. However, to improve device performance, advanced research is still needed to reduce point defects in the SiC epitaxial layer. This work investigated the electrical characteristics and defect properties using DLTS analysis. Four deep level defects generated by the implantation process and during epitaxial layer growth were detected. Trap parameters such as energy level, capture-cross section, trap density were obtained from an Arrhenius plot. To investigate the impact of defects on the device, a 2D TCAD simulation was conducted using the same device structure, and the extracted defect parameters were added to confirm electrical characteristics. The degradation of device performance such as an increase in on-resistance by adding trap parameters was confirmed.

• 전자공학회논문지D
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• 제35D권8호
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• pp.15-23
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• 1998

Single crystalline I $n_{x}$G $a_{1-x}$ N thin film was grwon by MOCVD on (001) sapphire substrate for the blue light emitting devices. A good quality of I $n_{0.13}$G $a_{0.87}$N/GaN heterostructure grwon above 700.deg. C was confiremed by various characterization techniques of AFM, RHEED and DC-XRD. Through PL measurement at room temperautre for the Si-Zn co-doped I $n_{x}$G $a_{a-x}$N/GaN structure grwon at 800.deg. C to obtain blue wavelength emission, 460-470 nm and 425 nm emission peak were observed, which are believed to be from donor-to-acceptor pair transition and band edge emission of In/x/G $a_{1-x}$ N, respectively. The result of PL measurement of the undoped MQW I $n_{x}$G $a_{1-x}$ N layer at low temperature confirmed that the strong MQW peak was resulted by exciton from the GAN barrier and carrier of DA pair confined into the well layer.ll layer.yer.r.

• 전자통신동향분석
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• 제5권1호
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• pp.55-70
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• 1990

SIMOX SOI is known to be one of the most useful technologies for fabrications of new generation ULSI devices. This paper describes the current status of SIMOX SOI technology for ULSI applications. The SIMOX wafer is vertically composed of buried oxide layer and silicon epitaxial layer on top of the silicon substrate. The buried oxide layer is used for the vertical isolation of devices The oxide layer is formed by high energy ion implantation of high dose oxygen into the silicon wafer, followed by high temperature annealing. SIMOX-based CMOS fabrication is transparent to the conventional IC processing steps without well formation. Furthermore, thin film CMOX/SIMOX can overcome the technological limitations which encountered in submicron bulk-based CMOS devices, i.e., soft-error rate, subthreshold slope, threshold voltage roll-off, and hot electron degradation can be improved. SIMOX-based bipolar devices are expected to have high density which comparable to the CMOX circuits. Radiation hardness properties of SIMOX SOI extend its application fields to space and military devices, since military ICs should be operational in radiation-hardened and harsh environments. The cost of SIMOX wafer preparation is high at present, but it is expected to reduce as volume increases. Recent studies about SIMOX SOI technology have demonstrated that the performance of the SIMOX-based submicron devices is superior to the circuits using the bulk silicon.