• 한국재료학회:학술대회논문집
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• 한국재료학회 1999년도 춘계학술발표강연 및 눈문개요집
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• pp.15-15
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• 1999

• 한국재료학회:학술대회논문집
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• 한국재료학회 1996년도 재료학회 춘계학술발표회
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• pp.10-10
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• 1996

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.59-59
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• 2011

We will report atomically sharp epitaxial growth of $Bi_2Se_3$ three-dimensional topological insulator films on Si(111) substrate with molecular beam epitaxy (MBE). It was achieved by employing two step growth temperatures to prevent any formation of second phase, like as $SiSe_2$ clusters, between $Bi_2Se_3$ and Si substrate at the early stage of growth. The growth rate was determined completely by Bi flux and the Bi:Se flux ratio was kept ~1:15. The second-phase-free atomically sharp interface was verified by RHEED, TEM and XRD. Based on the RHEED analysis, the lattice constant of $Bi_2Se_3$ relaxed to its bulk value during the first quintuple layer implying the absence of strain from the substrate. Single-crystalline XRD peaks of $Bi_2Se_3$ were observed in films as thin as 4 QL. TEM shows full epitaxial structure of $Bi_2Se_3$ film down to the first quintuple layer without any second phases. This growth method was used to grow high quality epitaxial $Bi_2Se_3$ films from 3 QL to 3600 QL. The magneto-transport properties of these thin films show a robust 2D surface state which is thickness independent.

• 한국재료학회지
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• 제8권6호
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• pp.484-492
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• 1998

단결정 Si기판위의 Co/Ti 이중층으로부터 형성된 Co 실리사이드의 에피텍셜 성장기구에 대하여 조사하였다. 실리사이드화 과정중 Ti원자들이 저온상의 CoSi결정구조의 tetrahedral site들을 미리 점유해 있음으로 인하여, $CoSi_{2}$ 결정구조로 바뀌는 과정에서 Si원자들이 나중에 제위치를 차지하기 어렵게 되는 효과 때문이다. 그리고 Ti중간층은 반응의 초기단계에 Co-Ti-O 삼원계 화합물을 형성하는데, 이 화합물은 실리사이드화 과정중 반응 제어층으로 작용하여 에피텍셜 실리사이드 형성에 중요한 역할을 한다. 최종 열처리 층구조 Ti oxide/Co-Ti-Si/epi/$Cosi_{2}$(100) Si 이었다.

• 전자공학회논문지D
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• 제34D권1호
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• pp.23-29
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• 1997

Effects of Co thickness on the formation of epitaxial $CoSi_2$ from the Co/Ti bilayer have been investigated. Ti and Co were sequentially deposited with the Ti thickness fixed at 5 or 10nm, while the Co thickness was varied from 5 to 30nm. The metal-deposited samples were then rapidly thermal-annealed in $N_2$ at $900^{\circ}C$ for 20 sec. Material properties of $CoSi_2$ thin films were analyzed by the 4-point probe, XRD, AES, andXTEM. When the as-deposited Co thickness was below 15nm, the $CoSi_2$ with high resistivity and rough interface was formed. On the other hand, when the Co thickness was above 15 nm, the epitaxial $CoSi_2$ with the resistivity of about 16 ~ 19 $\mu\Omega.cm$, uniform composition and thickness and flat interface was formed. Initial Ti thickness has sizable effect on the formation of $CoSi_2$, when the Co layer was very thin (~ 5 nm). But there was no significant effect of the Ti thickness for the initial Co thickness of above 15 nm.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 추계학술대회 논문집 Vol.14 No.1
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• pp.73-76
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• 2001

We deposited epitaxial $Ba_{0.6}Sr_{0.4}TiO_{3}(BST)$ films having thickness of 400 nm on MgO(001) substrates, where a 10 nm thick $Ba_{1-x}Sr_{x}TiO_{3}$ (x = 0.1 - 0.7) interlayer was inserted between BST and MgO to manipulate the stress of the BST films. Since the main difference of those epitaxial BST films was the lattice constant of the interlayers, we were very successful in controlling the stress of the BST films. BST films under small tensile stress showed larger dielectric constant than that without stress as well as those under compressive stress. Stress relaxation was investigated using epitaxial BST films with various thicknesses grown on different interlayers. For BST films grown on $Ba_{0.7}Sr_{0.3}TiO_{3}$ interlayers, the critical thickness was about 600 nm. On the other hand, the critical thickness of single-layer BST film was less than 100 nm.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 추계학술대회 논문집
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• pp.73-76
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• 2001

We deposited epitaxial $Ba_{0.6}$S $r_{0.4}$Ti $O_3$(BST) films having thickness of 400 nm on MgO(001) substrates, where a 10 nm thick $Ba_{1-x}$S $r_{x}$Ti $O_3$(x=0.1-0.7) interlayer was inserted between BST and MgO to manipulate the stress of the BST films. Since the main difference of those epitaxial BST films was the lattice constant of the interlayers, we were very successful in controlling the stress of the BST films. BST films under small tensile stress showed larger dielectric constant than that without stress as well as those under compressive stress. Stress relaxation was investigated using epitaxial BST films with various thicknesses grown on different interlayers. For BST films grown on $Ba_{0.7}$S $r_{0.3}$Ti $O_3$ interlayers, the critical thickness was about 600 nm. On the other hand, the critical thickness of single-layer BST film was less than 100 nm.00 nm.m.m.m.

• 한국전기전자재료학회논문지
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• 제13권11호
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• pp.908-913
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• 2000

CoSi$_2$/p+/n diodes(bilayer diodes) were fabricated by using epitaxial CoSi$_2$grown from Co/Ti bilayer as a diffusion source. The I-V characteristics of p+/n diodes were measured and compared with those of diode made from Co monolayer (monolayer diode). Monolayer diodes showed typical p+n junction characteristics with the leakage current of as low as 10$^{-12}$ A and forward current 6-orders higher than the leakage current, when drive-in annealed at 90$0^{\circ}C$ for 20 sec.. On the other hand, bilayer diodes showed the Schottky-like behaviors with forward currents rather higher than those of monolyer diodes, but with too high leakage currents, when drive-in annealed at $700^{\circ}C$ or higher. However, when the annealing temperature was lowered to $700^{\circ}C$ and annealing time was increased to 60 sec., the leakage current was reduced to 10$^{-11}$ A and thus sho3wed typical diode characteristics. The high leakage currents for diodes annealed at $700^{\circ}C$ or higher was attributed to Shannon contacts formed due to unremoved Co-Ti-Si precipitates. But when annealed at 50$0^{\circ}C$, B ions diffused in the direction of the surface layer, and thus the leakage currents were reduced by removing Shannon contacts.

• 전기전자학회논문지
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• 제23권3호
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• pp.811-816
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• 2019

초고진공 화학기상증착장치(UHV-CVD)에 의해 성장된 실리콘-흡착된 산소(Si-O) 초격자가 실리콘 양자전자소자를 위한 에피택셜 장벽으로 소개되었다. 전류-전압 측정 결과 높은 브레이크다운 전압을 갖는 매우 안정하고 양호한 절연특성을 나타내었다. 에피택셜 성장된 Si-O 초격자는 SOI(silicon on insulator)를 대체할 수 있는 절연층으로도 사용될 수 있음을 보여준다. 이 두꺼운 장벽은 전계효과트랜지스터(FET)의 절연 게이트로 유용하게 사용될 수 있어 FET 위에 또 다른 FET를 제작할 수 있으므로 미래 실리콘계 3차원 집적회로의 궁극적인 목표에 한층 더 다가갈 수 있는 가능성을 보여주는 것이다.

• 한국항해항만학회:학술대회논문집
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• 한국항해항만학회 2000년도 추계학술대회논문집
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• pp.97-100
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• 2000

Si$_2$Sr$_2$CuO$\sub$x/(Bi(2201)) thin films are fabricated by atomic layer by layer deposition using ion beam sputtering(IBS) method. During the deposition, 10 %-ozone/oxygen mixture gas of typical 5.0 ${\times}$ 10$\^$-5/ Torr is applied with ultraviolet light irradiation for oxidation. XRD and RHEED investigations reveal out that a buffer layer with some different compositions is formed at the early deposition stage of less than 10 units cell and then c-axis oriented Bi(2201) is grown.