• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.04b
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• pp.85-88
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• 2004

Mono-crystalline silicon(mono-Si) is both abundant in our environment and an excellent material for Si device applications. However, single crystalline silicon solar cell has been considered to be expensive for terrestrial applications. For that reason, the last few years have seen very rapid progress in the research and development activities of layer transfer(LT) processes. Thin film Si layers which can be detached from a reusable mono-Si wafers served as a substrate for epitaxial growth. The epitaxial films have a very high efficiency potential. LT technology is a promising approach to reduce fabrication cost with high efficiency at large scale since expensive Si substrate can be recycled. Low quality Si can be used as a substrate. Therefore, we propose one of the major technologies on fabricating thin film Si substrate using a LT. In this paper, we study the LT method using the electrochemical etching(ECE) and solid edge.

• Proceedings of the Materials Research Society of Korea Conference
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• 2012.05a
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• pp.85-85
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• 2012

NiO는 니켈 공공과 침입형 산소 이온에 의한 비화학적양론 특성 때문에 자발적으로 p-형 반도체 특성을 나타내는 것으로 알려져 있다. NiO는 3.7 eV 의 넓은 밴드갭을 가지고 있어 투명소자를 위한 hole injection layer 나 hole transport layer로 사용하기 위한 연구가 많이 이루어지고 있다. 또한, 안정적인 p-형 반도체 특성은 n-형 산화물 반도체와의 접합을 통해 복합소자의 구현이 용이하기 때문에, ZnO 등과의 접합을 통한 소자 구현이 가능하다.[1] 하지만, 기존의 많은 연구에서는 내부의 결함이 많이 존재하는 다결정 박막을 사용하였기 때문에, 전하의 이동에 제한이 발생해, 충분한 소자 특성을 나타내지 못하였다. 최근 Dutta의 연구에 의하면, 결정질 사파이어 기판위에 박막을 성장할 경우 [111] 방향으로 우선 배향성을 가진 NiO 박막을 얻을 수 있다고 알려져 있다.[2] 본 실험에서는 NiO 박막을 이용한 PN 접합소자 구현을 위해 사파이어 위에 p-NiO 박막을 에피택셜하게 성장한 후 구조적 특성을 분석하였으며, n-ZnO 박막을 그 위에 성장하여 소자를 제작하였다. 그 결과 ZnO 또한 에피택셜한 성장을 하는 것을 확인할 수 있었다. 성장순서에 따른 PN 접합구조 특성을 확인하기 위해 사파이어 위에 ZnO 를 성장시킨 후 NiO 를 성장시킨 결과 NiO 박막의 우선성장 방향이 [100]으로 변하는 것을 확인할 수 있었다.

• Korean Journal of Crystallography
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• v.13 no.2
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• pp.57-62
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• 2002

Time-of-flight impact-collision ion scattering spectroscopy (TOF-ICISS) was applied to study the geometrical structure of epitaxially grown TiO layers on a MgO(001) surface. The hetero-epitaxial TiO layer was deposited by thermal evaporation of titanium onto the MgO(001) surface and subsequent exposure to oxygen at 400℃. The well-ordered TiO structure was confirmed with the 1×1 RHEED pattern. TOF-ICISS results revealed that the TiO layer was formed at the on-top sites of the MgO(001) substrate and that the lateral lattice constant of TiO layer was the same as that of the MgO substrate. The surface of the deposited epitaxial TiO layer was smooth without the three dimensional islands.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.399-399
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• 2013

Metal silicides는 Si 기반의microelectronic devices의 interconnect와 contact 물질 등에 사용하기 위하여 그 형성 mechanism과 전기적 특성에 대한 연구가 많이 이루어지고 있다. 이 중 Rare-earth(RE) silicides는 저온에서 silicides를 형성하고, n-type Si과 낮은 Schottky Barrier contact (~0.3 eV)을 이룬다. 또한 낮은 resistivity와 Si과의 작은 lattice mismatch, 그리고 epitaxial growth의 가능성, 높은 thermal stability 등의 장점을 갖고 있다. RE silicides 중 ytterbium silicide는 가장 낮은 electric work function을 갖고 있어 n-channel schottky barrier MOSFETs의 source/drain으로 주목받고 있다. 또한 Silicon 기반의 CMOSFETs의 성능 향상 한계로 인하여 germanium 기반의 소자에 대한 연구가 이루어져 왔다. Ge 기반 FETs 제작을 위해서는 낮은 source/drain series/contact resistances의 contact을 형성해야 한다. 본 연구에서는 저접촉 저항 contact material로서 ytterbium germanide의 가능성에 대해 고찰하고자 하였다. HRTEM과 EDS를 이용하여 ytterbium germanide의 미세구조 분석과 면저항 및 Schottky Barrier Heights 등의 전기적 특성 분석을 진행하였다. Low doped n-type Ge (100) wafer를 1%의 hydrofluoric (HF) acid solution에 세정하여 native oxide layer를 제거하고, 고진공에서 RF sputtering 법을 이용하여 ytterbium 30 nm를 먼저 증착하고, 그 위에 ytterbium의 oxidation을 방지하기 위한 capping layer로 100 nm 두께의 TiN을 증착하였다. 증착 후, rapid thermal anneal (RTA)을 이용하여 N2 분위기에서 $300{\sim}700^{\circ}C$에서 각각 1분간 열처리하여 ytterbium germanides를 형성하였다. Ytterbium germanide의 미세구조 분석은 transmission electron microscopy (JEM-2100F)을 이용하였다. 면 저항 측정을 위해 sulfuric acid와 hydrogen peroxide solution (H2SO4:H2O2=6:1)에서 strip을 진행하여 TiN과 unreacted Yb을 제거하였고, 4-point probe를 통하여 측정하였다. Yb germanides의 면저항은 열처리 온도 증가에 따라 감소하다 증가하는 경향을 보이고, $400{\sim}500^{\circ}C$에서 가장 작은 면저항을 나타내었다. HRTEM 분석 결과, deposition 과정에서 Yb과 Si의 intermixing이 일어나 amorphous layer가 존재하였고, 열처리 온도가 증가하면서 diffusion이 더 활발히 일어나 amorphous layer의 두께가 증가하였다. $350^{\circ}C$ 열처리 샘플에서 germanide/Ge interface에서 epitaxial 구조의 crystalline Yb germanide가 형성되었고, EDS 측정 및 diffraction pattern을 통하여 안정상인 YbGe2-X phase임을 확인하였다. 이러한 epitaxial growth는 면저항의 감소를 가져왔으며, 열처리 온도가 증가하면서 epitaxial layer가 증가하다가 고온에서 polycrystalline 구조의 Yb germanide가 형성되어 면저항의 증가를 가져왔다. Schottky Barrier Heights 측정 결과 또한 면저항 경향과 동일하게 열처리 증가에 따라 감소하다가 고온에서 다시 증가하였다.

• Proceedings of the KIEE Conference
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• 1995.07c
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• pp.1025-1027
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• 1995

SEG(Selective Epitaxial Growth) and ELO(Epitaxial Lateral Growth) of Silicon offer new opportunities in the fabrication of MEMS(Micro Electro-Mechanical Systems) structures. SEG of silicon enables the stacking of junctions in addition to those resulting from the standard bipolar process and this properly was utilized for the fabrication of an improved-performance color sensor. When the crystalline growth takes place through the seed windows and proceeds over the dielectric, after reaching the surface, it form an ELO silicon layer and this ELO-Si can be modified into various structures for MEMS application such as cantilevers, beams, diaphragms.

• Transactions of the Korean Society of Automotive Engineers
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• v.4 no.5
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• pp.9-15
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• 1996

A silicon microaccelerometer is designed and fabricated using silicon epitaxial layers for automotive electronic airbag applications. A cantilever structure is chosen for high sensitivity and piezoresistive detection method is adopted for circuit simplicity and low cost. An optimum design is used to find optimum microstructure sizes for maximum sensitivity subject to performance requirements and design constraints on natural frequency, damping ratio, maximum allowable stress and microfabrication limitations. The microaccelerometer is fabricated by micromachining processing steps, composed of material-selective and orientation-dependent chemical etching techniques. Fabricated prototype shows a sensitivity of 88.6$\mu\textrm{V}$/g within a resonant frequency of 1.75KHz. Estimated performance of the microaccelerometer is compared with measured one. Discrepancy between the theoretical values and the experimental values is discussed together with possible sources of the errors.

• Journal of the Semiconductor & Display Technology
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• v.10 no.4
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• pp.107-112
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• 2011

This paper is for improving the RF frequency performance of a fabricated 100nm ${\Gamma}$-gate MHEMT, scaling down vertically for the epitaxy-structure layers of the device. Hydrodynamic simulation parameters are calibrated for the fabricated MHEMT with the modulation-doped $In_{0.52}Al_{0.48}As/In_{0.53}Ga_{0.47}$As heterostructure grown on the GaAs substrate. With these calibrated parameters, simulations for the vertically-scaled epitaxial layers of the device are performed and analyzed for DC/RF characteristics, including the quantization effect due to the thickness reduction of InGaAs channel layer. A newly designed epitaxy-structure device shows higher extrinsic transconductance, $g_m$ of 1.556 S/mm, and higher frequency performance, $f_T$ of 222.5 GHz and $f_{max}$ of 849.6 GHz.

• Journal of the Optical Society of Korea
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• v.16 no.3
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• pp.292-298
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• 2012

The epitaxial layer structures for blue InGaN light emitting diodes have been optimized for high brightness applications with the output power levels exceeding 1000 $W/cm^2$ by using a self-consistent finite element method. The light-current-voltage relationship has been directly estimated from the multiband Hamiltonian for wurtzite crystals. To analyze the efficiency droop at high injection levels, the major nonradiative recombination processes and carrier spillover have also been taken into account. The wall-plug efficiency at high injection levels up to several thousand $A/cm^2$ has been successfully evaluated for various epilayer structures facilitating optimization of the epitaxial structures for desired output power levels.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.2
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• pp.125-130
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• 2000

Two step growth of reduced pressure chemical vapor eposition has been successfully developed to achieve in-situ phosphorus-doped silicon epilayers, and the characteristic evolution on their microstructures has been investigated using scanning electron microscopy, transmission electron microscopy, and secondary ion mass spectroscopy. The two step growth, which employs heavily in-situ P doped silicon buffer layer grown at low temperature, proposes crucial advantages in manipulating crystal structures of in-situ phosphorus doped silicon. In particular, our experimental results showed that with annealing of the heavily P doped silicon buffer layers, high-quality epitaxial silicon layers grew on it. the heavily doped phosphorus in buffer layers introduces into native oxide and plays an important role in promoting the dispersion of native oxides. Furthermore, the phosphorus doping concentration remains uniform depth distribution in high quality single crystalline Si films obtained by the two step growth.

• Journal of the Korean Institute of Navigation
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• v.16 no.2
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• pp.21-27
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• 1992

Shortening the lasing wavelength(particularly below infrared ; the visible region) of laser diodes is very attractive because it can provide a wide range of applications in the fields of optical information, measurement, sensor, the development of medical instrument, and optical communication through plastic fibers. According to the recent researches on the field, InGaAsP/GaAs was suggested as a material for red-light laser. In this study, in order to grow InGaAsP/GaAs epitaxial layer on InGaAsP/GaAs by LPE, we used GaP and InP two phase solution technique for 670nm and 780 nm region, respectively. Through the X-ray diffraction measurement for the epitaxial layer grown from the experiments, we found that the lattice mismatch of $In_{0.46}Ga_{0.54}As_{0.07}P_{0.93}$/GaAs and $In_{0.19}Ga_{0.81}As_{0.62}P_{0.38}$/GaAs was about +0.3% and +0.1%, respectively.