• Korean Journal of Materials Research
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• v.22 no.4
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• pp.190-194
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• 2012

The formation of high-quality polycrystalline silicon (poly-Si) on relatively low cost substrate has been an important issue in the development of thin film solar cells. Poly-Si seed layers were fabricated by an inverse aluminum-induced crystallization (I-AIC) process and the properties of the resulting layer were characterized. The I-AIC process has an advantage of being able to continue the epitaxial growth without an Al layer removing process. An amorphous Si precursor layer was deposited on Corning glass substrates by RF magnetron sputtering system with Ar plasma. Then, Al thin film was deposited by thermal evaporation. An $SiO_2$ diffusion barrier layer was formed between Si and Al layers to control the surface orientation of seed layer. The crystallinity of the poly-Si seed layer was analyzed by Raman spectroscopy and x-ray diffraction (XRD). The grain size and orientation of the poly-Si seed layer were determined by electron back scattering diffraction (EBSD) method. The prepared poly-Si seed layer showed high volume fraction of crystalline Si and <100> orientation. The diffusion barrier layer and processing temperature significantly affected the grain size and orientation of the poly Si seed layer. The shorter oxidation time and lower processing temperature led to a better orientation of the poly-Si seed layer. This study presents the formation mechanism of a poly seed layer by inverse aluminum-induced crystallization.

• Journal of the Korean Vacuum Society
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• v.8 no.3B
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• pp.322-326
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• 1999

We have investigated the growing process of a silicon film on the $CeO_2/Si$ surface. The silicon was deposited by using electron beam deposition method. The $CeO_2$(111) film was grown on a (111)-oriented silicon substrate at $700^{\circ}C$ at oxygen [partial pressure of $5\times10^{-5}$ Torr. To investigate the condition of epitaxial growth of si films on the $CeO_2/Si$ substrate, we deposited Si at various temperature니 The overlayer silicon was characterized by using x-ray diffraction(XRD). double crystal x-ray diffraction (DCXRD), and transmission electron microscopy (TEM). At temperature higher than $690^{\circ}C$, $CeO_2$ layer was observed at the $CeO_2/Si$ interface, which was formed by chemical reaction with silicon and oxygen dissociated from $CeO_2$. When silicon was deposited on the $CeO_2/Si$ at $620^{\circ}C$, silicon grew epitaxially along the (111)-direction.

• Nuclear Engineering and Technology
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• v.55 no.1
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• pp.201-208
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• 2023

The dependence of the electrical characteristics on the fast neutron fluence of an epitaxial 4H-SiC Schottky barrier diode (SBD) was investigated. The 30 MeV cyclotron was used for fast neutron irradiation. The neutron fluences evaluated through Monte Carlo simulation were in the 2.7 × 10¹¹ to 1.45 × 10¹³ neutrons/cm² range. Current-voltage and capacitance-voltage measurements were performed to characterize the samples by extracting the parameters of the irradiated SBDs. Neutron-induced defects in the epitaxial layer were identified and quantified using a deep-level transient spectroscopy measurement system developed at the Korea Atomic Energy Research Institute. As the neutron fluence increased from 2.7 × 10¹¹ to 1.45 × 10¹³ neutrons/cm², the concentration of the Z_1/2 defects increased by approximately 20 times. The maximum defect concentration was estimated as 1.5 × 10¹⁴ cm^-3 at a neutron fluence of 1.45 × 10¹³ neutrons/cm².

• Journal of Sensor Science and Technology
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• v.3 no.1
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• pp.5-11
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• 1994

This paper describes the characteristics of a piezoresistive pressure sensor fabricated on a SOI (Si-on-insulator) structure, in which the SOI structures of Si/$SiO_{2}$/Si and Si/$Al_{2}O_{3}$/Si were formed by SDB (Si-wafer direct bonding) technology and hetero-epitaxial growth, respectively. The SOI pressure sensors using the insulator of a SOI structure as the dielectrical isolation layer of piezoresistors, were operated at higher temperatures up to $300^{\circ}C$. In the case of pressure sensors using the insulator of a SOI structure as an etch-stop layer during the formation of thin Si diaphragms, the pressure sensitivity variation of the SOI pressure sensors was controlled to within a standard deviation of ${\pm}2.3%$ over 200 devices. Moreover, the pressure sensors fabricated on the double SOI ($Si/Al_{2}O_{3}/Si/SiO_{2}/Si$) structures formed by combining SDB technology with epitaxial growth also showed very excellent characteristics with high-temperature operation and high-resolution.

• Journal of the Korean Vacuum Society
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• v.16 no.5
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• pp.343-347
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• 2007

Fe thin films exhibited (100) preferential orientation when they were deposited at low deposition rate of $0.1{\AA}/s$ on glass substrates by using facing target sputtering system. The (100) oriented Fe layer induces (100) orientation of Pt layer deposited on it owing to hetero-epitaxial growth. After annealing at $600^{\circ}C$ in $H_2$ atmosphere, FePt films exhibited f.c.t. (001) texture in the whole film caused by inter-diffusion between atoms. We have also confirmed that the homogeneously inter-diffused compositional modulation in the film after the annealing process. Furthermore, annealing process in $Ar+H_2$ atmosphere at $400^{\circ}C$ during Pt deposition was effective for attaining Pt (100) texture. The annealing process during Pt deposition also induced in low annealing temperature and decreased annealing time for attaining the FePt f.c.t. (001) structure.

• Journal of the Korean Magnetics Society
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• v.2 no.1
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• pp.15-21
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• 1992

Acicular ${\gamma}-Fe_{2}O_{3}$ particles were heated at $90^{\circ}C$ in alkaline solution containing mixed solution of dyadic metal with $Co^{+2}/Fe^{+2}$ ratio of 0.5. When cobalt content was increased, the coercivity of resultant product increased linearly, and surface area decreased. The cobalt ferrite was grown epitaxially on the surface ${\gamma}-Fe_{2}O_{3}$ crystal, and the increase of coercivity was attributed to the crystalline magnetic anisotropy of the cobalt ferrite which is conform to coating layer. We can expect superior magnetic properties above normal ratio of 2. The progress of reaction has an effect on coercivity of cobalt ferrite epitaxial iron oxide. The stability of temperature and the change om standin& of $Co-{\gamma}-Fe_{2}O_{3}$ was largely influenced by the composition of coating layer.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.9-10
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• 2010

Since the discovery of graphene by mechanical exfoliation from graphite[1], various fabrication methods are available today such as chemical exfoliation, epitaxial graphene on SiC substrates, etc. In view of industrialization, the mechanical exfoliation method may not be an option. Epitaxial graphene on SiC substrates, in this respect, is by far more practical because the method consists of conventional thermal treatments familiar to semiconductor industry. Still, the use of the SiC substrate itself, and hence the incompatibility with the Si technology, lessens the importance of this technology in its future industrialization. In this context, we have tackled the problem of forming graphene on Si substrates (GOS). Our strategy is to form an ultrathin (~80 nm) SiC layer on top of a Si substrate, and to graphitize the top SiC layers by a vacuum annealing. We have actually succeeded in forming the GOS structure [2,3,4]. Raman-scattering microscopy indicates presence of few-layer graphene (FLG) formed on our annealed SiC/Si heterostructure, with the G ($1580\;cm^{-1}$) and the G'($2700\;cm^{-1}$) bands, both related to ideal graphene, clearly observed. Presence of the D ($1350\;cm^{-1}$) band indicates presence of defects in our GOS films, whose elimination remains as a challenge in the future. To obtain qualified graphene films on Si substrate, formation of qualified SiC films is crucial in the first place, and is achieved by tuning the growth parameters into a process window[5]. With a potential for forming graphene films on large-scale Si wafers, GOS is a powerful candidate as a key technology in bringing graphene into silicon technology.

• Korean Journal of Materials Research
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• v.34 no.2
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• pp.111-115
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• 2024

Silicon carbide (SiC) has emerged as a promising material for next-generation power semiconductor materials, due to its high thermal conductivity and high critical electric field (~3 MV/cm) with a wide bandgap of 3.3 eV. This permits SiC devices to operate at lower on-resistance and higher breakdown voltage. However, to improve device performance, advanced research is still needed to reduce point defects in the SiC epitaxial layer. This work investigated the electrical characteristics and defect properties using DLTS analysis. Four deep level defects generated by the implantation process and during epitaxial layer growth were detected. Trap parameters such as energy level, capture-cross section, trap density were obtained from an Arrhenius plot. To investigate the impact of defects on the device, a 2D TCAD simulation was conducted using the same device structure, and the extracted defect parameters were added to confirm electrical characteristics. The degradation of device performance such as an increase in on-resistance by adding trap parameters was confirmed.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.8
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• pp.15-23
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• 1998

Single crystalline I $n_{x}$G $a_{1-x}$ N thin film was grwon by MOCVD on (001) sapphire substrate for the blue light emitting devices. A good quality of I $n_{0.13}$G $a_{0.87}$N/GaN heterostructure grwon above 700.deg. C was confiremed by various characterization techniques of AFM, RHEED and DC-XRD. Through PL measurement at room temperautre for the Si-Zn co-doped I $n_{x}$G $a_{a-x}$N/GaN structure grwon at 800.deg. C to obtain blue wavelength emission, 460-470 nm and 425 nm emission peak were observed, which are believed to be from donor-to-acceptor pair transition and band edge emission of In/x/G $a_{1-x}$ N, respectively. The result of PL measurement of the undoped MQW I $n_{x}$G $a_{1-x}$ N layer at low temperature confirmed that the strong MQW peak was resulted by exciton from the GAN barrier and carrier of DA pair confined into the well layer.ll layer.yer.r.

• Electronics and Telecommunications Trends
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• v.5 no.1
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• pp.55-70
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• 1990

SIMOX SOI is known to be one of the most useful technologies for fabrications of new generation ULSI devices. This paper describes the current status of SIMOX SOI technology for ULSI applications. The SIMOX wafer is vertically composed of buried oxide layer and silicon epitaxial layer on top of the silicon substrate. The buried oxide layer is used for the vertical isolation of devices The oxide layer is formed by high energy ion implantation of high dose oxygen into the silicon wafer, followed by high temperature annealing. SIMOX-based CMOS fabrication is transparent to the conventional IC processing steps without well formation. Furthermore, thin film CMOX/SIMOX can overcome the technological limitations which encountered in submicron bulk-based CMOS devices, i.e., soft-error rate, subthreshold slope, threshold voltage roll-off, and hot electron degradation can be improved. SIMOX-based bipolar devices are expected to have high density which comparable to the CMOX circuits. Radiation hardness properties of SIMOX SOI extend its application fields to space and military devices, since military ICs should be operational in radiation-hardened and harsh environments. The cost of SIMOX wafer preparation is high at present, but it is expected to reduce as volume increases. Recent studies about SIMOX SOI technology have demonstrated that the performance of the SIMOX-based submicron devices is superior to the circuits using the bulk silicon.