• Title/Summary/Keyword: Embedded Test

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A Strategy of Selecting Critical Items for Reliability Tests Using Fuzzy Inference (퍼지추론을 이용한 신뢰성 시험 대상 품목 선정 전략)

  • Son, Young-Beom;Yang, Jung-Min
    • IEMEK Journal of Embedded Systems and Applications
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    • v.13 no.4
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    • pp.205-214
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    • 2018
  • The reliability test is a crucial step for ensuring robustness of high-cost and complex weapon systems. In this paper, we present a set of quantitative criteria to select critical parts or components in weapon systems for the reliability test, and implement a fuzzy inference system by applying developed criteria to fuzzy theory. We classify the selection criteria of critical parts or components into four fuzzy sets and membership functions. A fuzzy inference rule is proposed based on the AHP (Analytic Hierarchy Process) analysis technique so as to derive a convincing reliability test. The credibility of the fuzzy inference system is confirmed through a case study using actual equipment data exacted from an existent weapon system.

Development of Dementia Screening Application Using Urine Test and Bionic Sensors (소변검사와 생체센서를 이용한 치매 스크리닝 애플리케이션 개발)

  • Kim, Jun-Young;Cho, Myeon-Gyun
    • IEMEK Journal of Embedded Systems and Applications
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    • v.10 no.2
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    • pp.109-117
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    • 2015
  • In this paper, we have developed smart-phone App(application) for screening Dementia using bionic sensors, urine test and questionnaire. Since small amounts of urinary protein strongly predict faster cognitive decline in the elderly, smart-phone based urinalysis is adopted to screen dementia more accurately as well as bionic sensors such as $SpO_2$ and HRV(Heart Rate Variability). Firstly, DI(Dementia Index) is calculated from urinalysis, two bionic sensors and electric questionnaire, and then compared to the threshold from clinical test. Finally the results of Dementia screening is shown in your smart-phone and useful information to prevent or relieve Dementia is also given. We performed simple testing on persons aged over 60 and found out the proposed application can be useful devices for screening Dementia easily and quickly.

Evaluation of ERS(Embedded Rail Track System): Design and Experiments (매립형철도궤도 시스템 성능평가)

  • Park, Jeung-Geun;Kim, Sun-Cheol;Han, Jong-Mon
    • Proceedings of the KSR Conference
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    • 2008.06a
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    • pp.1662-1671
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    • 2008
  • The ERS(Embedded Rail Track system) is constructed in the world due to a slab track system having maintenance free, high structural safety, and deduction of noise and vibration. The ADRI-ERS is developed as Korean type. This paper shows that the design of ADRI-ERS and experiments according to DIN EN 13481-5 and Korea high speed train test guidelines. The ADRI-ERS has high structural safety in pull-out test, longitudinal resistance test, and fatigue test. The design method of ADRI-ERS is proposed by two design constants due to the result of experiments also.

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A Design of a Simulation Platform to Test PRT Vehicle Operational Control Algorithms Using On-board Embedded Process Board (차상용 임베디드 제어보드를 이용한 PRT 차량 운행제어 알고리즘 시험을 위한 플랫폼 설계)

  • Lee, Jun-Ho;Jeong, Rac-Gyo;Kim, Yong-Kyu
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.10
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    • pp.1962-1967
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    • 2009
  • This paper deals with a design of a platform to simulate PRT vehicle operational control algorithms using on-board embedded process board. The configuration of the platform is composed of the central control module, the station control module, man-machine interface and monitoring module. Since PRT system needs inherently very reliable vehicle operational control algorithm in order to avoid the impact between vehicles, it is very important to construct a simulation platform to test a designed vehicle operational control algorithm during the development process For the test of the proposed platform a path of the each moving vehicle is predefined in the central control system before the dispatch order is given to the vehicle. The simulation results show the effectiveness of the proposed simulation platform for test and evaluation of the PRT operational control algorithms.

Development of FPGA-based failure detection equipment for SMART TV embedded camera (FPGA를 이용한 SMART TV용 내장형 카메라 불량 검출 장비 개발)

  • Lee, Jun Seo;Kim, Whan Woo;Kim, Ji-Hoon
    • Journal of Korea Society of Industrial Information Systems
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    • v.18 no.5
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    • pp.45-50
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    • 2013
  • Recently, as the market for SMART TV expands, the camera is embedded for providing various user experience. However, this leads to occurrence of camera failure due to TV power up sequence problem, which are usually not detectable in conventional test equipments. Although the failure-detection can be possible by re-generating control signals for audio interface with new equipment, it is expensive and also requires much time to test. In this paper, for SMART TV, FPGA(Field Programmable Gate Array)-based failure-detection system is proposed which can lead to reduction of both cost and time for test.

A Generic BIST Builder of Multiple RAM Modules Embedded in ASIC Chips (ASIC에 실장되는 다중 RAM 모듈 테스트룰 위한 BIST 회로 생성기의 구현)

  • Chang, Jong-Kwon
    • The Transactions of the Korea Information Processing Society
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    • v.5 no.6
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    • pp.1633-1638
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    • 1998
  • In this paper we propose a generic BIST builder for the Embedded Multiple HAM modules in ASICs, The BlST circuitry is automatically generated according to the specification of the target RAM Modules and the applying test algorithms to them. The lJIST is designed using the TOP-DOWN technique and, thus, has the several advantages in the area of the selection of test algorithm, the development of the circuitry, and the reuse of the circuitry, In addition, we have modified the existing serial interiacing approach to obtain smaller additional BlST circuitry and higher fault coverage and better B1ST sharing of the target RAM Modules in ASICs.

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The Implementation of the Built-In Self-Test for AC Parameter Testing of SDRAM (SDRAM 의 AC 변수 테스트를 위한 BIST구현)

  • Sang-Bong Park
    • The Journal of Information Technology
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    • v.3 no.3
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    • pp.57-65
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    • 2000
  • We have proposed BIST method and circuit for embedded 16M SDRAM with logic. It can test the AC parameter of embedded 16M SDRAM using the BIST circuit capable of detecting the address of a fail cell of a 16M SDRAM installed in an Merged Memory with Logic(MML) generating the information of repair for redundancy circuit. The function and AC parameter of the embedded memory can also be tested using the proposed BIST method. The total gate of the BIST circuit is approximately 4,500 in the case of synthesizing by $0.25\mu\textrm{m}$ cell library. and verify the result of Verilog simulation. The test time of each one AC parameter is about 200ms using 2Y-March 14N algorithm.

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A Kernel-level RTP for Efficient Support of Multimedia Service on Embedded Systems (내장형 시스템의 원활한 멀티미디어 서비스 지원을 위한 커널 수준의 RTP)

  • Sun Dong Guk;Kim Tae Woong;Kim Sung Jo
    • Journal of KIISE:Computing Practices and Letters
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    • v.10 no.6
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    • pp.460-471
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    • 2004
  • Since the RTP is suitable for real-time data transmission in multimedia services like VoD, AoD, and VoIP, it has been adopted as a real-time transport protocol by RTSP, H.323, and SIP. Even though the RTP protocol stack for embedded systems has been in great need for efficient support of multimedia services, such a stack has not been developed yet. In this paper, we explain embeddedRTP which supports the RTP protocol stack at the kernel level so that it is suitable for embedded systems. Since embeddedRTP is designed to reside in the UBP module, existing applications which rely ell TCP/IP services can proceed the same as before, while applications which rely on the RTP protocol stack can request HTP services through embeddedRTp API. EmbeddedRTP stores transmitted RTP packets into per session packet buffer, using the packet's port number and multimedia session information. Communications between applications and embeddedRTP is performed through system calls and signal mechanisms. Additionally, embeddedRTP API makes it possible to develop applications more conveniently. Our performance test shows that packet-processing speed of embeddedRTP is about 7.5 times faster than that oi VCL RTP for multimedia streaming services on PDA in spite that its object code size is reduced about by 58% with respect to UCL RTP's.

Estimation of Load-Settlement Curves of Embedded Piles Combining Results of End of Initial Driving and Restrike Dynamic Pile Tests (초기항타 및 재항타 동재하시험 결과를 조합한 매입말뚝의 하중-침하량 곡선 산정)

  • Seo, Mi Jeong;Park, Jong-Bae;Park, Min-Chul;Lee, Jong-Sub
    • Journal of the Korean Geotechnical Society
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    • v.36 no.7
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    • pp.15-28
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    • 2020
  • As the skin friction of an embedded pile is produced by the cement paste injected into the borehole, the skin friction cannot be evaluated by the end of initial driving test, which is conducted before the cement paste is cured. In addition, the total resistance of an embedded pile may not be properly evaluated during the restrike test if the base resistance is not fully mobilized because of the insufficient driven energy. The objective of this study is to suggest a new load-settlement curve of embedded piles by combining the results of the end of initial driving and restrike tests. Test piles are installed at fields by using the embedded pile method, and the results of the dynamic pile tests are analyzed using CAse Pile Wave Analysis Program (CAPWAP) after the end of initial driving and restrike tests are conducted. A new load transfer curve, which combines the behaviors of the pile base at the end of initial driving and of the pile shaft at the restrike, is suggested, and a new load-settlement curve is obtained. Subsequently, the resistances of the test piles are evaluated using the combined load-settlement curve, and compared with the results from the end of initial driving and restrike tests. The results showed that the resistances, which are evaluated using the combined load-settlement curve, may overcome the underestimation of the resistance because of the insufficient driven energy. In addition, the resistance resulted from the combined load-settlement curve may be more similar to that from the static load test because the suggested load transfer curve is closer to the behavior of the embedded pile compared to the results of end of initial driving and restrike tests. Therefore, this study demonstrates that the combined load-settlement curve may be effectively used for the evaluation of the bearing capacity of embedded piles.

Interfacial Sensing and Evaluation of Carbon and SiC Fibers/Epoxy Composites with Different Embedding Angle using Electro-Micromechanical Technique (Electro-Micromechanical Technique을 이용한 각의 변화에 따른 Carbon과 SiC Fiber/Epoxy Composites의 계면감지능 및 평가)

  • Lee, Sang-Il;Kong, Jin-Woo;Park, Joung-Man
    • Proceedings of the Korean Society For Composite Materials Conference
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    • 2002.05a
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    • pp.199-202
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    • 2002
  • Interfacial properties and electrical sensing for fiber fracture in carbon and SiC fibers/epoxy composites were investigated by the electrical resistance measurement and fragmentation test. As fiber-embedded angle increased, interfacial shear strength (IFSS) of two-type fiber composites decreased, and the elapsed time was long to the infinity in electrical resistivity. The initial slope of electrical resistivity increased rapidly to the infinity at higher angle, whereas electrical resistivity increased gradually at small angle. Furthermore, both fiber composites with small embedded angle showed a fully-developed stress whitening pattern, whereas both composites with higher embedded angle exhibited a less developed stress whitening pattern. As embedded angle decreased, the gap between the fragments increased and the debonded length was wider for both fiber composites. Electro-micromechanical technique can be a feasible nondestructive evaluation to measure interfacial sensing properties depending on the fiber-embedded angle in conductive fiber reinforced composites.

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