• Journal of KIISE:Software and Applications
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• v.36 no.8
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• pp.607-615
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• 2009

There has recently been a trend that IT industry is united with traditional industries such as military, aviation, automobile, and medical industry. Therefore, embedded software which controls hardware of the system should guarantee the high reliability, availability, and maintainability. To guarantee these properties, there are many attempts to develop the embedded software based on COTS (Commercial Off The Shelf) hardware components. However, it can cause additional faults due to software/hardware interactions beside general software faults in this methodology. We called the faults, Linkage Fault. These faults have high severity that makes overall system shutdown although their occurrence frequency is extremely low. In this paper, we propose a new software reliability model which considers those linkage faults in embedded software development with COTS hardware components. We use the Bayesian Analysis and Markov Chain Monte-Cairo method to validate the model. In addition, we analyze real linkage fault data to support the results of the theoretical model.

• KSCI Review
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• v.14 no.2
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• pp.153-158
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• 2006

A device driver is the core construction providing connectable rules between a hardware and an operating system in Embedded softwares. It provides consistent interface for the control and mutual interactions so that an application program can use hardware's functionalities. However, the device driver is suffered to develop as it is related to both hardware and software and it is also wasted to newly develop whenever hardware platform changed. Therefore, this paper researches the method to provide high portability in heterogenous hardware and finally suggests efficient device driver development.

• Proceedings of the Korea Information Processing Society Conference
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• 2009.11a
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• pp.67-68
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• 2009

Increasing use of embedded systems has made many improvements on hardware development for specific purpose. Hardware changes are more expensive and harder to implement rather than software changes. Developers need tools to do design and testing of new hardware. Many simulation tools have been made to mimic the hardware and allow developer to test programs on top of new hardware. Virtual Development Environment for Embedded Software (VDEES) is one of the alternatives available. It provides an open source based platform and an Integrated Development Environment (IDE) that can be used to build and testing newly made component, faster and at low-cost.

• Proceedings of the KSR Conference
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• 2009.05a
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• pp.483-494
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• 2009

Since the embedded system is more intelligent, the importance of the reliability in the embedded system is a lot more visible. Especially the reliability of the embedded system in the train control system is even better important. As the special quality of the embedded system, the hardware of the system is directly controlled by the software in the embedded system. As the expansion of complexity, the expense amd the time for verification is required more and more. This paper is presented the verification of the reliability as the method with background of failure Embedded system is gradually, the importance of 'A built-in on the system embedded system's reliability is focused. In particular, in the train control system built-in of the embedded system, reliability is even more important. The embedded system of the system controls over hardware, software with built-in directly. The more complex system is, the more increasable of depending on the reliability of the time verification and expensive is. This paper is about he characteristics of the reliability and verification of embedded system under the failure mechanisms, based on the verification methodology suggested by in the train control system.

• ETRI Journal
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• v.31 no.6
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• pp.732-740
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• 2009

This paper describes the implementation of a digital audio effect system-on-a-chip (SoC), which integrates an embedded digital signal processor (DSP) core, audio codec intellectual property, a number of peripheral blocks, and various audio effect algorithms. The audio effect SoC is developed using a software and hardware co-design method. In the design of the SoC, the embedded DSP and some dedicated hardware blocks are developed as a hardware design, while the audio effect algorithms are realized using a software centric method. Most of the audio effect algorithms are implemented using a C code with primitive functions that run on the embedded DSP, while the equalization effect, which requires a large amount of computation, is implemented using a dedicated hardware block with high flexibility. For the optimized implementation of audio effects, we exploit the primitive functions of the embedded DSP compiler, which is a very efficient way to reduce the code size and computation. The audio effect SoC was fabricated using a 0.18 ${\mu}m$ CMOS process and evaluated successfully on a real-time test board.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.2116-2120
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• 2003

A frame buffer device is an abstraction for the graphic hardware. It allows application software to access the graphic hardware through a well-defined interface, so that the software doesn’t need to know anything about the low-level interface stuff. We develop a frame buffer driver for VIA’s CLE266 graphic system based on ‘Qplus’, an embedded linux operating system developed by ETRI. Then, it will be seen that our frame buffer system is applied to embedded solutions such as movie player and X server successfully.

• Journal of the Institute of Convergence Signal Processing
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• v.13 no.2
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• pp.83-90
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• 2012

In this paper, an intelligent visual surveillance system based on a NIOS II embedded platform is implemented. By this time, embedded based visual surveillance systems were restricted for a special purpose because of high dependence upon hardware. In order to improve the restriction, we implement a flexible embedded platform, which is available for various purpose of applications. For high speed processing of software based programming, we improved performance of the system which is integrated the SOPC type of NIOS II embedded processor and image processing algorithms by using software programming and C2H(The Altera NIOS II C-To-Hardware(C2H) Acceleration Compiler) compiler in the core of the hardware platform. Then, we constructed a server system which globally manage some devices by the NIOS II embedded processor platform, and included the control function on networks to increase efficiency for user. We tested and evaluated our system at the designated region for visual surveillance.

• Journal of KIISE:Computing Practices and Letters
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• v.14 no.6
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• pp.547-558
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• 2008

Embedded system is tightly coupled with heterogeneous layers such as application, as kernel, device driver, HAL and hardware. Embedded system is customized for the specific purpose and hardware. In addition, the product cycle is so fast that software and hardware, which are developed by several vendors, are integrated together under unstable status. Therefore, there are lots of possibilities of faults in all layers. Because embedded software developers test their codes integrated with faulty layers, they cannot confirm 'whether testing of every aspects was completed, their code was failed, or integrated software/hardware has some problems'. In this paper, we propose an embedded software interface test method and a test tool called Justitia for detecting faults and tracing causes in the interface among heterogeneous layers. The proposed technique is an automated method which improves debugging upto professional testing using an emulator for helping developer.

• The Journal of the Korea Contents Association
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• v.10 no.1
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• pp.59-67
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• 2010

Laboratory works for embedded system courses are usually performed with hardware based experimental kits that equipped with an embedded board and software development tools. Hardware-based kits have demerits such as high initial setup cost, burdensome maintenance, inadaptability to industry evolution, and restricted educational outcomes. This paper proposes using virtual experimental environments to overcome the demerits of hardware-based kits and describes the design and implementation of a simulation-based virtual experimental kit. With ARM's ARMulator, we developed the kit by adding hardware IPs and user interface modules for peripherals. The developed kit is verified with an experimental program that uses all the augmented software modules. We also ported MicroC/OS-II on the virtual experimental kit for real-time OS experiments.

• 전자공학회논문지 IE
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• v.46 no.2
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• pp.7-10
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• 2009

This paper presents the implementation of libraries of hardware modules for genetic algorithm using VHDL. Evolvable hardware refers to hardware that can change its architecture and behavior dynamically and autonomously by interacting with its environment. So, it is especially suited to applications where no hardware specifications can be given in advance. Evolvable hardware is based on the idea of combining reconfigurable hardware device with evolutionary computation, such as genetic algorithm. Because of parallel, no function call overhead and pipelining, a hardware genetic algorithm give speedup over a software genetic algorithm. This paper suggests the hardware genetic algorithm for evolvable embedded system chip. That includes simulation results and analysis for several fitness functions. It can be seen that our design works well for the three examples.