• 제목/요약/키워드: Electronic packaging

검색결과 574건 처리시간 0.034초

High-density Through-Hole Interconnection in a Silicon Substrate

  • Sadakata, Nobuyuki
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2003년도 International Symposium
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    • pp.165-172
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    • 2003
  • Wafer-level packaging technology has become established with increase of demands for miniaturizing and realizing lightweight electronic devices evolution. This packaging technology enables the smallest footprint of packaged chip. Various structures and processes has been proposed and manufactured currently, and products taking advantages of wafer-level package come onto the market. The package enables mounting semiconductor chip on print circuit board as is a case with conventional die-level CSP's with BGA solder bumps. Bumping technology is also advancing in both lead-free solder alternative and wafer-level processing such as stencil printing using solder paste. It is known lead-free solder bump formation by stencil printing process tend to form voids in the re-flowed bump. From the result of FEM analysis, it has been found that the strain in solder joints with voids are not always larger than those of without voids. In this paper, characteristics of wafer-level package and effect of void in solder bump on its reliability will be discussed.

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전자 패키징 Interconnect 소재로의 카본 나노튜브의 활용 (Utilization of Carbon Nanotubes for New Interconnect Materials in Electronic Packaging)

  • 이종현
    • 마이크로전자및패키징학회지
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    • 제16권3호
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    • pp.1-10
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    • 2009
  • Carbon nanotube(CNT)s have been considered as one of the most unique materials due to the their superior mechanical, thermal and electrical properties. Therefore, numerous studies have been performed for the utilization of CNTs. This review article focuses on the recent research trends on the utilization of CNTs for new interconnect materials in electronics packaging. Major contents mentioned are the direct interconnection technology using CNTs and the main properties of polymer/CNTs composite materials. This article is aimed at the reviewing of important results from the recent studies and providing the straightforward understanding of the results through the mutual analysis and a industrial viewpoint.

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포장재질 및 탈산소재가 유과의 품질특성에 미치는 영향 (Effect of Packaging Material and Oxygen Absorbant on Quality Properties of Yukwa)

  • 이용환;금준석;안용식;김우정
    • 한국식품과학회지
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    • 제33권6호
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    • pp.728-736
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    • 2001
  • 본 연구에서는 우리의 전통한과인 유과의 저장성을 향상시키기 위하여 저장 중 저장조건에 따른 품질변화를 측정하고자 하였다. 유과를 상온에서 저장하면서 색을 측정한 결과 백색도(L)의 경우 저장기간 동안 전반적으로 감소하였고, 적색도(a)의 경우 E1EA 처리구는 감소하였고, 황색도(b)의 경우 저장초기부터 서서히 증가하였다. 텍스쳐에 있어서 상관성을 보이는 경도와 씹힘성의 경우 전반적으로 감소하는 경향이었으나 E2A, E2EA 처리구는 저장기간이 길어질수록 감소하였고 E1A 및 E1EA 처리구는 감소하다가 증가하는 경향이었다. 산가는 E2A 처리구는 12주 저장까지, E1A와 E1EA는 10주 저장까지 한과류에 대한 기준치인 2.0 이하로 측정되었다. 저장 중 산패의 지표인 과산화물가는 E1A, E2A 처리구는 저장 12주까지 기준치인 40이하로 측정되었으며. E2EA의 경우 단지 포장재만으로도 10주까지 34.65로 아주 낮은 값을 보여주었다. Electronic nose를 이용하여 대조구와 처리구간의 향기특성 패턴을 분석한 결과 6주 저장까지는 포장재질에 따른 향기특성의 변화가 가장 적은 것으로 나타났는데, 이는 탈산소재의 유무와 관계없이 포장재의 영향이 큰 것으로 생각된다. 관능특성에서 탈산소재 처리에 의한 것은 E2A 및 E2EA 처리구가 높게 평가되었는데 이는 포장재질의 영향으로 보이며, 포장재에 탈산소재를 첨가한 E2A가 가장 적합한 것으로 나타났다. 관능검사 결과와 전자코에 의한 향기성분 결과는 매우 유사한 경향을 나타내었다.

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3전극형 전자종이 디스플레이의 이미지 반전현상에 관한 연구 (A Study on Image Reversal Phenomenon of Three-Electrode Type Electronic Paper Display)

  • 신용관;김영조
    • 한국전기전자재료학회논문지
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    • 제28권8호
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    • pp.524-530
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    • 2015
  • We propose a three-electrode type electronic paper display and its fabrication process to realize single color at the same display panel. We establish a fabrication process with the mixing of electronic ink, loading of this ink, electronic ink assembly, packaging and driving. Also, we discuss an operating principle of this panel and the induced image reversal phenomenon by electric field area of the lower electrodes. This phenomenon is not occurred for the panel having $10{\mu}m$ electrode space. By this pixelation structure like this three-electronic paper display, a single color realization without color filter is possible and various kind of color is defined by a dye selection for charged particles and electrically neutral fluid.

Design and Fabrication of a Low-cost Wafer-level Packaging for RF Devices

  • Lim, Jae-Hwan;Ryu, Jee-Youl;Choi, Hyun-Jin;Choi, Woo-Chang
    • Transactions on Electrical and Electronic Materials
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    • 제15권2호
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    • pp.91-95
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    • 2014
  • This paper presents the structure and process technology of simple and low-cost wafer-level packaging (WLP) for thin film radio frequency (RF) devices. Low-cost practical micromachining processes were proposed as an alternative to high-cost processes, such as silicon deep reactive ion etching (DRIE) or electro-plating, in order to reduce the fabrication cost. Gold (Au)/Tin (Sn) alloy was utilized as the solder material for bonding and hermetic sealing. The small size fabricated WLP of $1.04{\times}1.04{\times}0.4mm^3$ had an average shear strength of 10.425 $kg/mm^2$, and the leakage rate of all chips was lower than $1.2{\times}10^{-5}$ atm.cc/sec. These results met Military Standards 883F (MIL-STD-883F). As the newly proposed WLP structure is simple, and its process technology is inexpensive, the fabricated WLP is a good candidate for thin film type RF devices.

OLED광원이 집적화된 마이크로 플루이딕칩의 제작 및 특성 평가 (Fabrication and characteristic evaluation of microfluidics chip integrated OLED for the light sources)

  • 김영환;한진우;김종연;김병용;서대식
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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    • pp.377-377
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    • 2007
  • A simplified integration process including packaging is presented, which enables the realization of the portable fluorescence detection system. A fluorescence detection microchip system consisting of an integrated PIN photodiode, an organic light emitting diode (OLED) as the light source, an interference filter, and a microchannel was developed. The on-chip fluorescence detector fabricated by poly(dimethylsiloxane) (PDMS)-based packaging had thin-film structure. A silicon-based integrated PIN photo diode combined with an optical filter removed the background noise, which was produced by an excitation source, on the same substrate. The active area of the finger-type PIN photo diode was extended to obtain a higher detection sensitivity of fluorescence. The sensitivity and the limit of detection (LOD S/N = 3) of the system were $0.198\;nA/{\mu}M$ and $10\;{\mu}M$, respectively.

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AlN 기판을 이용한 RF 고전력 증폭기 모듈 (RF High Power Amplifier Module using AlN Substrate)

  • 김승용;남충모
    • 한국전기전자재료학회논문지
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    • 제22권10호
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    • pp.826-831
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    • 2009
  • In this paper, a high power RF amplifier module using AlN substrate of high thermal conductivity has been proposed. This RF amplifier module has the advantage of compact size and effective heat dissipation for the packaging of high power chip. To fabricate the thru-hole and scribing line on AlN substrate, the key parameters of $CO_2$ laser were experimented. And then, microstrip lines and spiral planar inductors were fabricated on an AlN substrate using the thin-film process. The fabricated microstrip lines on the AlN substrate has an attenuation value of 0.1 dB/mm up to 10 GHz. The fabricated spiral planar inductor has a high quality factor, a maximum of about 62 at 1 GHz for a 5.65 nH inductor. Packaging of a RF power amplifier was implemented on an AlN substrate with thru-hole. From the measured results, the gain is 24 dB from 13 to 15 GHz and the output power is 33.65 dBm(2.3 W).

정전 열 접합에 의한 진공전자소자의 패키징 (Packaging of Vacuum Microelectronic Device using Electrostatic Bonding)

  • 주병권;이덕중;오명환
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1998년도 추계학술대회 논문집 학회본부 C
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    • pp.1004-1006
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    • 1998
  • Mo-tip FED of 1 inch diagonal was vacuum sealed using sodalime-to-sodalime glass electrostatic bonding under $10^{-7}torr$. The bonding properties of the bonded sodalime-to sodalime structure were investigated and emission characteristic of packaged FED panel was measured.

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전자패키징용 고열전도도-저열팽창계수 SiCp/Al 금속복합재료의 제조공정 및 특성평가 (Fabrication Process and Characterization of High Thermal Conductivity-Low CTE SiCp/Al Metal Matrix Composites for Electronic Packaging Applications)

  • 이효수;홍순형
    • 한국복합재료학회:학술대회논문집
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    • 한국복합재료학회 2000년도 춘계학술발표대회 논문집
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    • pp.190-194
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    • 2000
  • The fabrication process and thermal properties of 50∼76vo1% SiCp/Al metal matrix composites (MMCs) were investigated. The 50∼76vo1% SiCp/Al MMCs fabricated by pressure infiltration casting process showed that thermal conductivities were 85∼170W/mK and coefficient of thermal expansion (CTE) were ranged 10∼6ppm/K. Specially, the thermal conductivity and CTE of 71vo1%SiCp/Al MMCs were ranged l15∼156W/mK and 6∼7ppm/K, respectively, which showed a improved thermal properties than the conventional electronic packaging materials such as ceramics and metals.

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전자패키지 신뢰성 예측을 위한 최적 구간중도절단 시험 설계 (Optimal Interval Censoring Design for Reliability Prediction of Electronic Packages)

  • 권대일;신인선
    • 마이크로전자및패키징학회지
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    • 제22권2호
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    • pp.1-4
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    • 2015
  • Qualification includes all activities to demonstrate that a product meets and exceeds the reliability goals. Manufacturers need to spend time and resources for the qualification processes under the pressure of reducing time to market, as well as offering a competitive price. Failure to qualify a product could result in economic loss such as warranty and recall claims and the manufacturer could lose the reputation in the market. In order to provide valid and reliable qualification results, manufacturers are required to make extra effort based on the operational and environmental characteristics of the product. This paper discusses optimal interval censoring design for reliability prediction of electronic packages under limited time and resources. This design should provide more accurate assessment of package capability and thus deliver better reliability prediction.