• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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• pp.247-247
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• 2012

Plasmon subwavelength nanostructures enable the structurally modulated color due to the resonance conditions for the specific wavelength range of light with the nanoscale hole arrays on a metal layer. While the unique properties offered from a single layer of metal may open up the potential applications of integrated devices to displays and sensors, fabrication requirements in nanoscale, typically on the order of or smaller than the wavelength of light in a corresponding medium can limit the cost-effective implementation of the plasmonic nanostructures. Simpler nanoscale replication technologies based on the soft lithography or roll-to-roll nanoimprinting can introduce economically feasible manufacturing process for these devices. Such replication requires an optimal design of a master template to produce a stamp that can be applied for a roll-to-roll nanoimprinting. In this paper, a master mold with subwavelength nanostructures is fabricated and optimized using focused ion beam for the applications to nanoimprinting process. Au thin film layer is deposited by sputtering on a glass that serves as a dielectric substrate. Focused ion beam milling (FIB, JEOL JIB-4601F) is used to fabricate surface plasmon subwavelength nanostructures made of periodic hole arrays. The light spectrum of the fabricated nanostructures is characterized by using UV-Vis-NIR spectrophotometer (Agilent, Cary 5000) and the surface morphology is measured by using atomic force microscope (AFM, Park System XE-100) and scanning electron microscope (SEM, JEOL JSM-7100F). Relationship between the parameters of the hole arrays and the corresponding spectral characteristics and their potential applications are also discussed.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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• pp.45-48
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• 2002

This paper discusses the surface roughness of negative chemically amplified resists, SAL601 exposed by I-beam direct writing. system. Surface roughness, as measured by atomic force microscopy, have been simulated and compared to experimental results. Molecular-scale simulator predicts the roughness dependence on material properties and process conditions. A chemical amplification is made to occur in the resists during PEB process. Monte-Carlo and exposure simulations are used as the same program as before. However, molecular-scale PEB simulation has been remodeled using a two-dimensional molecular lattice representation of the polymer matrix. Changes in surface roughness are shown to correlate with the dose of exposure and tile baking time of PEB process. The result of simulation has a similar tendency with that of experiment.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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• pp.382-382
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• 2012

Nanostructures have a larger surface/volume ratio as well as unique mechanical, physical, chemical properties compared to existing bulk materials. Materials for biomedical implants require a good biocompatibility to provide a rapid recovery following surgical procedure and a stabilization of the region where the implants have been inserted. The biocompatibility is evaluated by the degree of the interaction between the implant materials and the cells around the implants. Recent researches on this topic focus on utilizing the characteristics of the nanostructures to improve the biocompatibility. Several studies suggest that the degree of the interaction is varied by the relative size of the nanostructures and cells, and the morphology of the surface of the implant [1, 2]. In this paper, we fabricate the nanowires on the Ti substrate for better biocompatible implants and other biomedical applications such as artificial internal organ, tissue engineered biomaterials, or implantable nano-medical devices. Nanowires are fabricated with two methods: first, nanowire arrays are patterned on the surface using e-beam lithography. Then, the nanowires are further defined with deep reactive ion etching (RIE). The other method is self-assembly based on vapor-liquid-solid (VLS) mechanism using Sn as metal-catalyst. Sn nanoparticle solutions are used in various concentrations to fabricate the nanowires with different pitches. Fabricated nanowries are characterized using scanning electron microscopy (SEM), x-ray diffraction (XRD), and high resolution transmission electron microscopy (TEM). Tthe biocompatibility of the nanowires will further be investigated.

• 한국진공학회:학술대회논문집
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• 한국진공학회 1999년도 제17회 학술발표회 논문개요집
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• pp.175-175
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• 1999

Circumventing problems lying in the conventional lithographic techniques, we devised a new method for the fabrication of nanometer scale metal wires inspired by the unique characteristics of carbon nanotubes (CNTs). Since carbon nanotubes could act as masks when CNT-coated thin Au/Ti layer on a SiO2 surface was physically etched by low energy argon ion bombardment 9ion milling), Au/Ti nano-wires were successfully formed just below the CNTs exactly duplicating their lateral shapes. Cross-sectional analysis by transmission electron microscopy revealed that the edge of the metal wire was very sharply developed indicating the great difference in the milling rates between the CNTs and the metal layer as well as the good directionality of the ion milling. We could easily find a few nanometer-wide Au/Ti wires among the wires of various width. After the formation of nano-wires, the CNTs could be pushed away from the metal nano-wire by atomic force microscopy, The lateral force for the removal of the CNTs are dependent upon the width and shape of the wires. Resistance of the metal nano-wires without the CNTs was also measured through the micro-contacts definted by electron beam lithography. since this CNT-based lithographic technique is, in principle, applicable to any kinds of materials, it can be very useful in exploring the fields of nano-science and technology, especially when it is combines with the CNT manipulation techniques.

• ETRI Journal
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• 제18권3호
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• pp.171-179
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• 1996

Fully passivated low noise AlGaAs/InGaAs/GaAs pseudomorphic (PM) HEMT with wide head T-shaped gates were fabricated by dose split electron beam lithography (DSL). The dimensions of gate head and footprint were optimized by controlling the splitted pattern size, dose, and spaces of each pattern. We obtained stable T-shaped gate of $0.15{\mu}m$ gate length with $1.35{\mu}m-wide$ head. The maximum extrinsic transconductance was 560 mS/mm. The minimum noise figure measured at 18 GHz at $V_{ds}=2V andI_{ds}=17mA$ was 0.41 dB with associated gain of 8.19 dB. At 12 GHz, the minimum noise figure and an associated gain were 0.26 and 10.25 dB, respectively. These noise figures are the lowest values ever reported for GaAs-based HEMTs. These results are attributed to the extremely low gate resistance of wide head T-shaped gate having a ratio of the head to footprint dimensions larger than 9.

• 한국재료학회지
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• 제14권2호
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• pp.133-140
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• 2004

We carried out anodic aluminum oxide (AAO) on a Si and a sapphire substrate. For anodic oxidation of Al two types of specimens prepared were Al(0.5 $\mu\textrm{m}$)!Si and Al(0.5 $\mu\textrm{m}$)/Ti(0.1 $\mu\textrm{m}$)$SiO_2$(0.1 $\mu\textrm{m}$)/GaN(2 $\mu\textrm{m}$)/Sapphire. Surface morphology of Al film was analyzed depending on the deposition methods such as sputtering, thermal evaporation, and electron beam evaporation. Without conventional electron lithography, we obtained ordered nano-pattern of porous alumina by in- situ process. Electropolishing of Al layer was carried out to improve the surface morphology and evaluated. Two step anodizing was adopted for ordered regular array of AAO formation. The applied electric voltage was 40 V and oxalic acid was used as an electrolyte. The reference electrode was graphite. Through the optimization of process parameters such as electrolyte concentration, temperature, and process time, a regular array of AAO was formed on Si and sapphire substrate. In case of Si substrate the diameter of pore and distance between pores was 50 and 100 nm, respectively. In case of sapphire substrate, the diameter of pore and distance between pores was 40 and 80 nm, respectively

• 한국진공학회지
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• 제15권6호
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• pp.637-641
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• 2006

본 논문에서는 100 nm 게이트 길이를 갖는 InGaAs/InAlAs/GaAs MHEMT(metamorphic high electron mobility transistors)m의 DC와 RF 특성을 분석 하였다. 이중 노광 방법으로 ZEP520/P(MMA-MAA)/PMMA 3층 구조의 레지스터와 게이트 길이 100 nm인 게이트를 제작하였다. 게이트의 단위 폭이 $70\;{\mu}m$인 2개의 게이트와 길이가 100 nm로 제작된 MHEMT를 DC 및 RF특성을 조사하였다. 최대 드레인 전류 밀도는 465 mA/mm, 상호전달 컨덕턴스는 844 mS/mm이, RF 측정으로부터 전류 이득 차단 주파수는 192 GHz와 최대 진동주파수 310 GHz인 특성을 보였다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.480-480
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• 2011

양극산화(anodization)는 금속을 전기화학적으로 산화시켜 금속산화물로 만드는 기술로서 최근 다양한 크기의 나노 구조를 제조하는 기술로 각광받고 있으며, 이러한 기술에 의하여 얻어지는 anodic aluminum oxide(AAO)는 magnetic data storage, optoelectronic device, sensor에 적용될 수 있는 nano device 뿐만 아니라 nanostructure를 제조하기 위한 template 및 mask로써 최근 광범위 하게 연구되고 있다. 또한, AAO는 Al2O3의 단단한 구조를 가진 무기재료이므로 solid mask로써 다른 porous materials 보다 뛰어난 특성을 갖고 있다. 또한 electron-beam lithography 및 block co-polymer 에 의한 patterning 과 비교하여 매우 경제적이며, 재현성이 우수할 뿐만 아니라 대면적에서 나노 구조의 크기 및 형상제어가 비교적 쉽기 때문에 널리 사용되고 있다. 그러나, AAO 형성 시 생기게 되는 반구형 모양의 barrier layer는 물질(substance)과 기판과의 direct physical and electrical contact을 방해하기 때문에 해결해야 할 가장 큰 문제점 중 하나로 알려져 있다. 따라서 본 연구에서는 실리콘 기판위의 형성된 AAO의 barrier layer를 Cl/BCl3 gas mixture에서 Neutral Beam Etching (NBE)과 Ion Beam Etching (IBE) 로 각각 식각한 후 그 결과와 비교하였다. NBE와 IBE 모두 Cl2/BCl3 gas mixture에서 BCl3 gas의 첨가량이 60% 일 경우 etch rate이 가장 높게 나타났고, optical emission spectroscopy (OES)로 Cl2/BCl3 플라즈마 내의 Cl radical density와 X-ray photoelectron spectroscopy (XPS)로 AAO 표면 위를 관찰한 결과 휘발성 BOxCly의 형성이 AAO 식각에 크게 관여함을 확인 할 수 있었다. 또한, NBE와 IBE 실험한 다양한 Cl2/BCl3 gas mixture ratio 에서 AAO가 식각이 되지만, 이온빔의 경우 나노사이즈의 AAO pore의 charging에 의해 pore 아래쪽의 위치한 barrier layer를 어떤 식각조건에서도 제거하지 못하였다. 하지만, NBE에서는 BCl3-rich Cl2/BCl3 gas mixture인 식각조건에서 AAO pore에 휘발성 BOxCly를 형성하면서 barrier layer를 제거할 수 있었다.

• 전자공학회논문지D
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• 제36D권12호
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• pp.37-42
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• 1999

본 논문에서는 차세대 집적회로의 핵심공정으로 부각되고 있는 CMP를 이용한 Cu Damascene 공정을 연구하였다. E-beam lithography, $SiO_2$ CVD 및 RIE, Ti/Cu CVD등의 제반 단위 공정을 연구하였으며, 연구된 단위공정으로 2창의 Cu금속 배선을 제작하였다. CMP 단위공정 연구결과, hend 압력 4 PSI, table 및 head 속도 25rpm, 진동폭 10mm, 슬러리 공급량 40ml/min에서 연마율 4,635 ${\AA}$/min, Cu:$SiO_2$의 선택율 150:1, 평탄도 4.0%를 얻었다. E-beam 및 $SiO_2$ vialine 공정연구결과, 100 ${\mu}C/cm^2$ 도즈와 6분 30초의 현상 및 1분 10초의 에칭시간으로 약 0.18 ${\mu}m\;SiO_2$ via-line을 형성하였다. 연구된 단위공정으로 sub-0.2 ${\mu}$의 Cu 금속라인을 제작하였으며, Cu void 및 Cu의 peeling으로 인한 다층공정시의 문제점과 재현성 향상 방법에 대해 논의하였다.

• 전기학회논문지
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• 제61권12호
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• pp.1828-1835
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• 2012

In this paper, a conceptual design and a detailed design of novel cylindrical magnetic levitation stage is introduced. This is came from planar-typed magnetic levitation stage. The proposed stage is composed of cylinder-typed permanent magnet array and semi-cylinder-typed 3 phase winding module. When a proper current is induced at winding module, a magnetic levitation force between the permanent magnet array and winding module is generated. The proposed stage can precisely move the cylinder to rotations and translations as well as levitations with the magnetic levitation force. This advantage is useful to make a nano patterning on the surface of cylindrical specimen by using electron beam lithography under vacuum. Two methods are used to calculate required magnetic levitation forces. The one is 2D FEM analysis, the other is mathematical modeling. This paper shown that results of two methods are similar. An assistant plate is introduced to reduce required currents of winding module for levitations in vacuum. The mathematical model of cylindrical magnetic levitation stage is used for dynamic simulation of magnetic levitations. A lead-lag compensator is used for control of the model. Simulation results shown that the detail designed model of the cylindrical magnetic levitation stage with the assistant plate can be controlled very well.