• Title/Summary/Keyword: Electrical circuit

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Hand Tracking and Calibration Algorithm Using the EPIC Sensors (EPIC 센서를 이용한 Hand Tracking 및 Calibration 알고리즘)

  • Jo, Jung Jae;Kim, Young Chul
    • Smart Media Journal
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    • v.2 no.1
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    • pp.27-30
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    • 2013
  • In this paper, we research the hand tracking and calibration algorithm using the EPIC sensor. We analyze the characteristics of EPIC sensor to be more sensitive in the around E-filed, and then we implement the 2-dimensional axis-transformation using the difference of detected amplitude between EPIC sensors. In addition, we implement the calibration algorithm considering the characteristics of EPIC sensor, and then we apply the Kalman filter to efficiently track a target. Thus, we implement the environment of window applications for verification and analysis the implemented algorithm. In turn, we use the DAQ API to extract the analog data. The DAQ hardware has the function of measuring and generating an electrical signal. Moreover, we confirm the movement of mouse cursor by detecting the potential difference depending on the movement of the user's hands.

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Characteristics Analysis of the CM and DM Noise Separator in EMI (EMI의 CM과 DM 성분 분리기의 특성 분석)

  • Park, Chan-Soo
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.17 no.5
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    • pp.49-55
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    • 2016
  • To separate the CM and DM noise in the EMI generated in various electrical electronic systems, passive and active separators have been researched. These separators are an important part of an effective active EMI-filter. The passive separator has some advantages, in that it is easy to realize at a low price and its structure is very simple. However, its major drawback is that its accurate inductor realization and accurate core selection are very difficult. The active separator is smaller in size and more accurate, but its main drawback is that an op-amp which has a broad band frequency response is necessary, its cost is high, and a DC power circuit is required. This paper compares the characteristics of EMI filters which apply the existing passive separator and proposed active separator. It was concluded that an active separator is needed for expensive and accurate equipment, whereas a passive separator is sufficient for inexpensive and general purpose EMI filters.

New Strategy for Eliminating Zero-sequence Circulating Current between Parallel Operating Three-level NPC Voltage Source Inverters

  • Li, Kai;Dong, Zhenhua;Wang, Xiaodong;Peng, Chao;Deng, Fujin;Guerrero, Josep;Vasquez, Juan
    • Journal of Power Electronics
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    • v.18 no.1
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    • pp.70-80
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    • 2018
  • A novel strategy based on a zero common mode voltage pulse-width modulation (ZCMV-PWM) technique and zero-sequence circulating current (ZSCC) feedback control is proposed in this study to eliminate ZSCCs between three-level neutral point clamped (NPC) voltage source inverters, with common AC and DC buses, that are operating in parallel. First, an equivalent model of ZSCC in a three-phase three-level NPC inverter paralleled system is developed. Second, on the basis of the analysis of the excitation source of ZSCCs, i.e., the difference in common mode voltages (CMVs) between paralleled inverters, the ZCMV-PWM method is presented to reduce CMVs, and a simple electric circuit is adopted to control ZSCCs and neutral point potential. Finally, simulation and experiment are conducted to illustrate effectiveness of the proposed strategy. Results show that ZSCCs between paralleled inverters can be eliminated effectively under steady and dynamic states. Moreover, the proposed strategy exhibits the advantage of not requiring carrier synchronization. It can be utilized in inverters with different types of filter.

Trends in standards of low voltage circuit breaker and activities of IEC SC17B, SC17D (저압차단기 규격동향 및 IEC SC17B, SC17D 활동에 관한 고찰)

  • Lee, Dong-Jun;Roh, Chang-Il;Jung, Heung-Soo;Kim, Sun-Koo;Kim, Won-Man;Kim, Sun-Ho;Kim, Chul-Hwan
    • Proceedings of the KIEE Conference
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    • 2007.07a
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    • pp.951-952
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    • 2007
  • International Electrotechnical Commission (IEC)은 국제 규격을 제 개정하는 단체로서, 1906년에 설립된 조직이다. 2006년 말 기준으로 67개국의 회원 국가를 보유하고 있으며 총 5,613개의 규격을 제 개정하고 있다. IEC는 많은 수의 규격을 제 개정하기 위하여 100개의 Technical Committee (TC)와, 각 TC 산하에 Subcommittees(SC)를 두고 있다. SC는 다시 산하에 Working group(WG)을 두어 실제적으로 해당 국제규격의 제 개정은 바로 이 WG에서 작업을 하게 된다. 본 논문에서는 IEC TC17내의 SC17B와 SC17D의 구성, 현황 및 활동과 현재 진행되고 있는 저압차단기의 규격동향에 대하여 고찰하였다. IEC TC17은 차단기, 개폐기(스위치), 단로기, 버스관로 및 배전반등과 관련된 IEC 규격의 제 개정을 담당하고 있다. TC17 산하의 SC17B는 저압 차단기, SC17D는 저압배전반제품과 관련된 규격을 관리하고 있다. 한국은 SC17B와 SC 17D의 P-member(Participant)로서 투표권을 갖고 있으며, 한국전기연구원이 운영간사를 맡고 있다. 현재 국내기업체 전문가와 연구원들의 의견을 수렴하여 국가의견으로서 IEC에 제출하고 있지만 앞으로 더 많은 전문가들의 참여가 시급한 실정이다.

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A Research Trend on Film Thickness Dependence of Ac High Feld for Low Density Polyethylene (저밀도 폴리에틸렌을 위한 고전계 파형의 필름 두께의존성에 관한 연구 동향)

  • Jung, Sung-Chan;Rho, Jung-Hyun;Lee, Joo-Hong;Hwang, Jong-Sun;Choi, Yong-Sung;Lee, Kyung-Sup
    • Proceedings of the KIEE Conference
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    • 2007.07a
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    • pp.1988-1989
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    • 2007
  • Polyethylene is widely used as the insulator for power cable. To investigate the conduction mechanism for power cable insulation under ac high field, it is very important to acquire the dissipation current under actual running field. Recently, we have developed the unique system, which make possible to observe the nonlinear dissipation current waveform. In this system, to observe the nonlinear properties with high accuracy, capacitive current component is canceled by using inverse capacitive current signal instead of using the bridge circuit for canceling it. We have already reported that the dissipation currents of $40\;{\mu}m$ thick LDPE film at 10 kV/mm and over 140 Hz, it starts to show nonlinearity and odd number's harmonics were getting large. To investigate the conduction mechanis ms in this region, especially space charge effect, various kinds of estimation, such as time variations of instantaneous resistivity for one cycle, FFT spectra of dissipation current waveforms and so on, has been examined. As the results of these estimations, it was found that the dissipation current will depend on not only the instantaneous value of electric field but also the time differential of applied electric field due to taking a balance between applied field and internal field. Furthermore, two large peaks of dissipation current for each half cycle were observed under certain condition. In this paper, to clarify the reason why it shows two peaks for each half cycle, the film thickness dependences of dissipation current waveforms were observed by using the three different thickness LDPE films.

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Formation Mechanisms of Sn Oxide Films on Probe Pins Contacted with Pb-Free Solder Bumps (무연솔더 범프 접촉 탐침 핀의 Sn 산화막 형성 기제)

  • Bae, Kyoo-Sik
    • Korean Journal of Materials Research
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    • v.22 no.10
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    • pp.545-551
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    • 2012
  • In semiconductor manufacturing, the circuit integrity of packaged BGA devices is tested by measuring electrical resistance using test sockets. Test sockets have been reported to often fail earlier than the expected life-time due to high contact resistance. This has been attributed to the formation of Sn oxide films on the Au coating layer of the probe pins loaded on the socket. Similar to contact failure, and known as "fretting", this process widely occurs between two conductive surfaces due to the continual rupture and accumulation of oxide films. However, the failure mechanism at the probe pin differs from fretting. In this study, the microstructural processes and formation mechanisms of Sn oxide films developed on the probe pin surface were investigated. Failure analysis was conducted mainly by FIB-FESEM observations, along with EDX, AES, and XRD analyses. Soft and fresh Sn was found to be transferred repeatedly from the solder bump to the Au surface of the probe pins; it was then instantly oxidized to SnO. The $SnO_2$ phase is a more stable natural oxide, but SnO has been proved to grow on Sn thin film at low temperature (< $150^{\circ}C$). Further oxidation to $SnO_2$ is thought to be limited to 30%. The SnO film grew layer by layer up to 571 nm after testing of 50,500 cycles (1 nm/100 cycle). This resulted in the increase of contact resistance and thus of signal delay between the probe pin and the solder bump.

Design of a Size-reduced Ring Hybrid Coupler Using an Artificial Dielectric Substrate (가유전체 기판을 이용한 소형화된 링 하이브리드 커플러의 설계)

  • Lim, Jongsik
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.15 no.5
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    • pp.3139-3145
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    • 2014
  • This paper describes the design of a size-reduced ring hybrid coupler for microwave band using an artificial dielectric substrate(ADS). ADS structure adopts the second substrate on which has lots of the metalized via-holes. The effective capacitance and effective dielectric constant per unit length of ADS increases compared to the normal substrate due to the via-holes. This enables the physical length of microstrip transmission line to be reduced by adopting ADS instead of the normal substrate. In order to present an example of size-reduction of microwave wireless circuit by ADS, a size-reduced 3GHz ring hybrid coupler is designed, fabricated and measured in this work. The designed coupler has the smaller size from the normal one by 65% due to the ADS, while no critical degradation from ideal performances is observed. The measured power division ratio at two output ports are -3.05dB and -3.135dB, respectively. In addition, the phase differences are 3o for in-phase division and 176o for out of phase split. The measured performances are so similar to ideal ones, and prove the design of size-reduced ring hybrid coupler using ADS is successful.

Effect of Plasma Treatment Times on the Adhesion of Cu/Ni Thin Film to Polyimide (폴리이미드와 Cu/Ni층과의 계면결합력에 미치는 플라즈마 처리 시간 효과)

  • Woo, Tae-Gyu;Park, Il-Song;Jung, Kwang-Hee;Jeon, Woo-Yong;Seol, Kyeong-Won
    • Korean Journal of Metals and Materials
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    • v.49 no.8
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    • pp.657-663
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    • 2011
  • This study represents the results of the peel strength and surface morphology according to the preprocessing times of polyimide (PI) in a Cu/Ni/PI structure flexible copper clad laminate production process based on the polyimide. Field emission scanning electron microscopy, X-ray diffraction, and X-ray photoelectron spectroscopy were used to analyze the surface morphology, crystal structure, and interface binding structure of sputtered Ni, Cu, and electrodeposited copper foil layers. The surface roughness of Ni, Cu deposition layers and the crystal structure of electrodeposited Cu layers were varied according to the preprocessing times. In the RF plasma times that were varied by 100-600 seconds in a preprocessing process, the preprocessing applied by about 300-400 seconds showed a homogeneous surface morphology in the metal layers and that also represented high peel strength for the polyimide. Considering the effect of peel strength on plastic deformation, preprocessing times can reasonably be at about 400 seconds.

Thermal Characteristics Investigation of 6U CubeSat's Deployable Solar Panel Employing Thermal Gap Pad (열전도 패드가 적용된 6U 큐브위성용 태양전지판의 열적 특성 분석)

  • Kim, Hye-In;Kim, Hong-Rae;Oh, Hyun-Ung
    • Journal of Aerospace System Engineering
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    • v.14 no.3
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    • pp.51-59
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    • 2020
  • In the case of cubesat, a PCB-based deployable solar panel advantageous in terms of weight reduction and electrical circuit design is widely used considering the limited weight and volume of satellites. However, because of the low thermal conductivity of PCB, there is a limit relative to heat dissipation. In this paper, the thermal gap pad is applied to the contact between the PCB-based solar panel and the aluminum stiffener mounted on the outside of the panel. Thus, the heat transfer from the solar cell to the rear side of the panel is facilitated. It maximizes the heat dissipation performance while maintaining the merits of PCB panel, and thus, it is possible to improve the power generation efficiency from reducing the temperature of the solar cell. The effectiveness of the thermal design of the 6U cubesat's deployable solar panel using the thermal gap pad has been verified through on-orbit thermal analysis based on the results, compared with the conventional PCB-based solar panel.

5-bit FLASH A/D Converter Employing Time-interpolation Technique (시간-보간법을 활용한 5-bit FLASH ADC)

  • Nam, Jae-Won;Cho, Young-Kyun
    • Journal of Convergence for Information Technology
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    • v.11 no.9
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    • pp.124-129
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    • 2021
  • A time-interpolation technique has been applied to the conventional FLASH analog-to-digital converter (ADC) to increase a number of quantization level, thus it reduces not only a power dissipation, but also minimize an active chip area. In this work, we demonstrated 5-bit ADC which has 31 quantization levels consisting of 16 conventional voltage-mode comparators and 15 time-mode comparators. As a result, we have achieved about 48.4% voltage-mode comparator reductions. The ADC is fabricated in a 14nm fin Field-effect transistor (FinFET) process with an active die area of 0.0024 mm2 while consuming 0.82 mW through a 0.8 V supply. At 400-MS/s conversion rate, the ADC performs 28.03 dB SNDR (4.36 ENOB) at 21MHz input frequency.