• 제목/요약/키워드: Electrical characterization

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유기 분자선 증착법에 의해 성막된 Pentacene 박막의 물리적, 전기적 특성에 관한 연구 (Physical and electrical characteristics of Pentacene thin films prepared by)

  • 김대엽;김대식;최종선;강도열;김영관
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1999년도 춘계학술대회 논문집
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    • pp.605-608
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    • 1999
  • We report investigations on a Pentacene thin film as a component for active layer of Organic thin film transistors. Pentacene film was deposited by Organic Molecular Beam Deposition(OMBD) and Al electrode was deposoted by vacuum evaporation. Electrical characterization of Pentacene films were measured by the three-terminal contact resistance methods, as the results contact resistance between pentacene films and the Aluminium electrode is 5.064G$\Omega$. The Al contact with the pentacene shows the bottom contact resistance. From the current-voltage characteristics, electrical conductivity of the Pentacene film is found as ~ 10$^{-4}$ /cm. physical characterization of pentacene films were measured by UV-spectrum and Cyclic-Voltammetry method.

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플라즈마 에칭으로 손상된 4H-실리콘 카바이드 기판위에 제작된 MOS 커패시터의 전기적 특성 (Electrical Characterization of MOS (metal-oxide-semiconductor) Capacitors on Plasma Etch-damaged 4H-Silicon Carbide)

  • 조남규;구상모;우용득;이상권
    • 한국전기전자재료학회논문지
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    • 제17권4호
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    • pp.373-377
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    • 2004
  • We have investigated the electrical characterization of metal-oxide-semiconductor (MOS) capacitors formed on the inductively coupled plasma (ICP) etch-damaged both n- and p-type 4H-SiC. We found that there was an effect of a sacrificial oxidation treatment on the etch-damaged surfaces. Current-voltage and capacitance-voltage measurements of these MOS capacitors were used and referenced to those of prepared control samples without etch damage. It has been found that a sacrificial oxidation treatment can improve the electrical characteristics of MOS capacitors on etch-damaged 4H-SiC since the effective interface density and fixed oxide charges of etch-damaged samples have been found to increase while the breakdown field strength of the oxide decreased and the barrier height at the SiC-SiO$_2$ interface decreased for MOS capacitors on etch-damaged surfaces.

저온 동시 소성세라믹으로 제작된 노출형 교차전극형 캐패시터의 특성 연구 (Characterization of Exposed interdigitated Capacitor in Low Temperature Co-fired Ceramic)

  • 안민수;강정한;윤일구
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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    • pp.38-39
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    • 2006
  • In this paper, we describe a method of accurate modeling capacitor in Low Temperature Co-fired Ceramic(LTCC). We obtain building blocks that present characterization of test structure through partial element equivalent circuit (PEEC) method. The extracted model of building blocks can be used for predicting behaviors of capacitors with different geometries. This method can provide the good inspection of capacitor to device engineer.

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디스플레이 장치를 위한 9개 채널 계조 응답 곡선에 기반한 역 특성화 기법 (Inverse Characterization Method Based on 9 Channel Tone Response Curves for Display Device)

  • 임혜봉;조양호;박기현;하영호
    • 대한전자공학회논문지SP
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    • 제42권5호
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    • pp.85-94
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    • 2005
  • 디지털 입력값과 이에 대응되는 CIEXYZ 삼 자극치 값에 대한 관계를 도출하는 기법인 디스플레이 특성화는 칼라 운영 시스템에서 정확한 색을 재현하는데 중요하다. 9개 채널 제조 응답 곡선으로부터 추정된 디스플레이 장치의 특성화는 기존 3개 채널의 계조 응답 곡선을 사용한 것 보다 성능이 향상된다. 하지만 9개 채널의 계조 응답 곡선을 사용한 디스플레이 장치의 특성화는 각각의 RGB값에 대응되는 CIEXYZ값이 분리되지 않기 때문에, 역 특성화 과정이 직접적으로 적용되지 않는다. 따라서 일반적인 경우 역 특성화 과정은 3차원 참조표를 사용하여 구현된다. 3차원 참조표를 역 특성화 과정에 적용할 경우, 결과의 정확도는 향상 되지만 많은 양의 메모리 공간과 다수의 측정 데이터가 필요한 단점이 있다. 그러므로 본 논문에서는 채널 의존적인 값의 모델링과 GOG(gain, offset gamma) 모델에 기반한 9개 채널의 역 변환 과정을 적용한 역 특성화 기법을 제안한다. 제안한 방법은 디스플레이 특성화의 정확도를 향상할 뿐 아니라 3차원 참조표 방법을 사용할 경우 요구되는 복잡도와 다수의 측정 데이터도 감소할 수 있다.

전기 및 유체 동시접속이 가능한 멀티칩 미소전기유체통합벤치의 설계, 제작 및 성능시험 (A Multi-chip Microelectrofluidic Bench for Modular Fluidic and Electrical Interconnections)

  • 장성환;석상도;조영호
    • 대한기계학회논문집A
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    • 제30권4호
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    • pp.373-378
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    • 2006
  • We present the design, fabrication, and characterization of a multi-chip microelectrofluidic bench, achieving both electrical and fluidic interconnections with a simple, low-loss and low-temperature electrofluidic interconnection method. We design 4-chip microelectrofluidic bench, having three electrical pads and two fluidic I/O ports. Each device chip, having three electrical interconnections and a pair of two fluidic I/O interconnections, can be assembled to the microelectofluidic bench with electrical and fluidic interconnections. In the fluidic and electrical characterization, we measure the average pressure drop of $13.6{\sim}125.4$ Pa/mm with the nonlinearity of 3.1 % for the flow-rates of $10{\sim}100{\mu}l/min$ in the fluidic line. The pressure drop per fluidic interconnection is measured as 0.19kPa. Experimentally, there are no significant differences in pressure drops between straight channels and elbow channels. The measured average electrical resistance is $0.26{\Omega}/mm$ in the electrical line. The electrical resistance per each electrical interconnection is measured as $0.64{\Omega}$. Mechanically, the maximum pressure, where the microelectrofluidic bench endures, reaches up to $115{\pm}11kPa$.

Electrically Enhanced Readout System for a High-Frequency CMOS-MEMS Resonator

  • Uranga, Arantxa;Verd, Jaume;Lopez, Joan Lluis;Teva, Jordi;Torres, Francesc;Giner, Joan Josep;Murillo, Gonzalo;Abadal, Gabriel;Barniol, Nuria
    • ETRI Journal
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    • 제31권4호
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    • pp.478-480
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    • 2009
  • The design of a CMOS clamped-clamped beam resonator along with a full custom integrated differential amplifier, monolithically fabricated with a commercial 0.35 ${\mu}m$ CMOS technology, is presented. The implemented amplifier, which minimizes the negative effect of the parasitic capacitance, enhances the electrical MEMS characterization, obtaining a $48{\times}10^8$ resonant frequency-quality factor product ($Q{\times}f_{res}$) in air conditions, which is quite competitive in comparison with existing CMOS-MEMS resonators.

자성물질을 이용한 나선형 인덕터의 고주파 특성 분석 (Characterization and Analysis of Integrated RF Ferromagnetic Spiral Inductors)

  • 차승용;김경범;정영채;최윤석;조근휘;이재성;황성우;현응경;이성래
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 추계학술대회 논문집 광주전남지부
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    • pp.109-111
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    • 2006
  • This paper presents characterization and analysis of integrated ferromagnetic inductors in RF regime. Two different materials (CoFe/NiFe) are used as ferromagnetic material. Systematic studies of the inductance (L), the Q-factor (Q) and the structure of the inductor have been performed.

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마이크로파 소자 응용을 위한 고온초전도 $YBa_2Cu_3O_{7-\delta}$ 에피택셜 박막의 제조 및 특성분석 (Preparation and Characterization of Epitaxial $YBa_2Cu_3O_{7-\delta}$ Thin Films for Fabrication of High-$T_{c}$ Superconducting Microwave Devices)

  • 강광용;한석길;김제하;이상렬
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1995년도 춘계학술대회 논문집
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    • pp.26-30
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    • 1995
  • We describe the preparation and characterization of epitaxial thin films made with high temperature superconductor, $YBa_2Cu_3O_{7-\delta}$. The influence of processing parameters for YBCO thin films on MgO substrates in-situ grown by the pulsed laser deposition, including parameters of a laser beam energy, oxygen pressure, substrate temperature, target-substrate dis-tance is discussed. The characteristics of YBCO thin films were analyzed by using XRD, R-T measurement, AFM, crosssectional TEM, and RBS. For examples of microwave device applications, The fabrication and characterization of the microstrip lowpass filter and bandpass filter are also presented.

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고온초전도체를 이용한 가지 형태 3 dB 방향성 결합기 설계 및 특성해석 (Design and Characterization of 3 dB Branch Type Directional Couplers using High-Tc Superconductors)

  • 정동철;최명호
    • 전기학회논문지
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    • 제59권1호
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    • pp.116-119
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    • 2010
  • In this work, we presented the characterization of 3 dB branch type directional couplers by using High-Tc superconducting thin films. To do this, we deposited YBCO superconducting thin films on MgO substrates by using rf-magnetron sputtering techniques. The designed center frequency was 408 MHz and the designed passband was 20 MHz. Also we designed 3 dB Power difference and $90^{\circ}$ of phase difference between port 3 and port 4. The even and odd mode analysis were used to characterize our directional couplers and em Sonnet (full wave analysis program) was utilized to the optimum design. We reported experimental results, including a center frequency, passband, half power characteristics and phase differences. We confirmed that experimental results were in good agreements with characterization by using full wave analysis program.

SILO 구조의 제작 방법과 소자 분리 특성 (Fabrication and characterization of SILO isolation structure)

  • 최수한;장택용;김병렬
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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    • pp.328-331
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    • 1988
  • Sealed Interface Local Oxidation (SILO) technology has been investigated using a nitride/oxide/nitride three-layered sandwich structure. P-type silicon substrate was either nitrided by rapid thermal processing, or silicon nitride was deposited by LPCVD method. A three-layered sandwich structure was patterned either by reactive ion etch (RIE) mode or by plasma mode. Sacrificial oxidation conditions were also varied. Physical characterization such as cross-section analysis of field oxide, and electrical characterization such as gate oxide integrity, junction leakage and transistor behavior were carried out. It was found that bird's beak was nearly zero or below 0.1um, and the junction leakages in plasma mode were low compared to devices of the same geometry patterned in RIE mode, and gate oxide integrity and transistor behavior were comparable. Conclusively, SILO process is compatible with conventional local oxidation process.

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