• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.3
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• pp.75-81
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• 2015

This paper proposed the new eight-parallel MDC FFT processor using the eight-parallel MDC architecture and the efficient scheduling scheme. The proposed FFT processor supports the 256-point FFT based on the modified radix-$2^6$ FFT algorithm. The proposed scheduling scheme can reduce the number of complex multipliers from eight to six without increasing delay buffers and computation cycles. Moreover, the proposed FFT processor can be used in OFDM systems required high throughput and low hardware complexity. The proposed FFT processor has been designed and implemented with a 90nm CMOS technology. The experimental result shows that the area of the proposed FFT processor is $0.27mm^2$. Furthermore, the proposed eight-parallel MDC FFT processor can achieve the throughput rate up to 2.7 GSample/s at 388MHz.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.6
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• pp.488-492
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• 2013

Current limiting diode (CLD) was fabricated using junction field effect transistor (JFET) structured two small cells and eight large cells. Two small cells and eight large cells were connected in parallel and the obtained constant current was 110 mA. The application of CLD in each of the parallel circuits on chip on board (COB) type LED lighting source, could significantly reduce the current deviation within the parallel circuits. The applications of CLD on AC power small lighting source, battery power low voltage parallel lighting source and AC flat lighting source were investigated.

• Journal of the Korea Institute of Military Science and Technology
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• v.12 no.1
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• pp.29-36
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• 2009

Realtime tide and storm-surge computations for the Yellow Sea were conducted using the Parallel Finite Element Model. For these computations a high resolution grid system was constructed with a minimum node interval of loom in Gyeonggi Bay. In the modeling, eight main tidal constituents were analyzed and their results agreed well with the observed data. The realtime tide computation with the eight main tidal constituents and the storm-surge simulation for Typhoon Sarah(1959) were also conducted using parallel computing system of MPI-based LINUX clusters. The result showed a good performance in simulating Typhoon Sarah and reducing the computation time.

• Journal of Korea Multimedia Society
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• v.7 no.4
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• pp.459-466
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• 2004

In this paper, an effective skeleton method is proposed in order to obtain an enhanced digital image of skeleton line. The binary image using the threshold values is applied in the preprocessing stage and then the modified parallel processing method is applied to obtain the improved image of skeleton line. The existing skeleton methods are Rutovitz, Steiabelli and other five skeleton methods. In the digital process of skeleton line, the major problem caused by these methods is elongated lines and noise branches of the processed image. In this study, however, such noises are deleted first by the modified parallel processing step of the proposed method. Then a pixel is compared to its eight neighbor pixels. if its neighbor pixels are in one of the eight conditions, the central pixel is deleted. As a result, the quality of the skeleton is better then those produced by the existing skeleton methods.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.29B no.1
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• pp.11-17
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• 1992

This paper is to propose an analytical queuing model for parallel processing of sequential program with nested loops. The analytical results are compared with the results from the implemented multiprocessor system composed of four intel 8088 microprocessor, eight 2KB shared common memories, and a hardware token ring. At results, this study shows that the processed results are almost similar in proposed analytical model and real system. Proposed analytical model can be applied to evaluate parallel processing of sequential program with nested loops.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.3C
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• pp.175-182
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• 2011

This paper presents a novel eight-parallel 128/256-point mixed-radix multi-path delay commutator (MRMDC) FFT/IFFT processor for orthogonal frequency-division multiplexing (OFDM) systems. The proposed FFT architecture can provide a high throughput rate and low hardware complexity by using an eight-parallel data-path scheme, a modified mixed-radix multi-path delay commutator structure and an efficient scheduling scheme of complex multiplications. The efficient scheduling scheme can reduce the number of complex multipliers at the second stage from 88 to 40. The proposed FFT/IFFT processor has been designed and implemented with the 90nm CMOS technology. The proposed eight-parallel FFT/IFFT processor can provide a throughput rate of up to 27.5Gsample/s at 430MHz.

• Journal of Sensor Science and Technology
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• v.24 no.3
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• pp.188-193
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• 2015

This paper presents a new byte-wise BCH (4122, 4096, 2) decoder, which treats byte-wise parallel operations so as to enhance its throughput. In particular, we evaluate the parallel processing technique for the most time-consuming components such as syndrome generator and Chien search owing to the iterative operations. Even though a syndrome generator is based on the conventional LFSR architecture, it allows eight consecutive bit inputs in parallel and it treats them in a cycle. Thus, it can reduce the number of cycles that are needed. In addition, a Chien search eliminates the redundant operations to reduce the hardware complexity. The proposed BCH decoder is implemented with VHDL and it is verified using a Xilinx FPGA. From the simulation results, the proposed BCH decoder can enhance the throughput as 43% and it can reduce the hardware complexity as 67% compared to its counterpart employing parallel processing architecture.

• Proceedings of the KSME Conference
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• 2004.04a
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• pp.810-815
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• 2004

In this paper, we propose new parallel mechanism of a 3 dimensional biped robot whose each leg is composed of two 3-dof parallel platforms linked serially. This proposed parallel mechanism is able to move freely in the man-made environment and is applied to various fields, such as medical, welfare, and so on. And a total weight of each leg is expected to be lighter than serial linked leg. One side leg consists of a 3-dof orientation platform and 3-dof asymmetric parallel platform. The former consists of three active linear actuators and seven passive joints, and the latter of two active linear actuators, one active rotational actuator and eight passive joints. Thus, there are two kinds of parallel platforms each chain's elements and active joint's positions are different for the biped robot to move freely like a serial link without the kinematics constraints. The effectiveness and the performance of the proposed parallel mechanism and locomotion trajectory are shown in computer simulations with a 12-DOF parallel biped robot.

• Structural Engineering and Mechanics
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• v.12 no.2
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• pp.157-168
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• 2001

In this paper, experimental investigation into the behavior of reinforced concrete (RC) columns tested under large lateral displacement with four different types of loading arrangements is presented. Each loading arrangement has a different system for controlling the consistency of the loading condition. One of the loading arrangements used three units of link mechanism to control the parallelism of the top and bottom stub of column during testing, and the remaining employed eight hydraulic jacks for the same purpose. The loading systems condition used in this investigation were similar to the actual case in a moment-resisting frame where the tested column was displaced in a double curvature. Ten model column specimens, divided into four series were prepared. Two columns were tested monotonically until collapse, and unless failure took place at an earlier stage of loading, the remaining eight columns were tested under cyclic loading. Test results indicated that the proposed system to keep the top and bottom stubs parallel during testing performed well.

• Journal of Korean Neurosurgical Society
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• v.49 no.2
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• pp.102-106
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• 2011

Objective : Although there are several explanations for a duplicated middle cerebral artery (DMCA), its embryological origin is still an open question. We reviewed these anomalous vessels to postulate a theory of their different origins, sizes, and courses. Methods : A retrospective review of 1,250 cerebral angiographies, 1,452 computed tomography (CT)-angiographies, and 2,527 magnetic resonance (MR)-angiographies was performed to identify patients with DMCA. Results : Twenty-five patients had 25 DMCAs. Conventional angiography detected nine patients with DMCA (9/1250, 0.72%), MR-angiography detected seven patients with DMCA 0.28%), and CT-angiography detected nine patients with DMCA (9/1452, 0.62%). The DMCAs originated near the internal carotid artery terminal in eight patients (type A), and between the origin of the anterior choroidal artery and the terminal internal carotid artery in 17 patients (type B). The diameters of the eight type A DMCAs were the same or slightly smaller than those of the other branch of the DMCA. All type A DMCAs showed a course parallel to that of the other branch of the DMCA. The diameters of the 17 type B DMCAs were the same, slightly smaller, or very much smaller than that of the other branch of the DMCA. Nine type B DMCAs showed parallel courses, and the other eight curved toward the temporal lobe. Conclusion : The two branches of the type A DMCAs can be regarded as early bifurcations of the MCA. The branches of the type B DMCAs had parallel courses or a course that curved toward the temporal lobe. The type B DMCA can be regarded as direct bifurcations of the MCA trunk or the early ramification of the temporal branch of the MCA.