• 제목/요약/키워드: Eight-parallel

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연산복잡도 감소를 위한 새로운 8-병렬 MDC FFT 프로세서 (New Parallel MDC FFT Processor for Low Computation Complexity)

  • 김문기;선우명훈
    • 전자공학회논문지
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    • 제52권3호
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    • pp.75-81
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    • 2015
  • 본 논문에서는 고속 데이터 전송을 위한 OFDM 시스템에 적용 가능한 고속 FFT 프로세서를 제안하였다. 8개의 병렬 경로를 가지는 MDC 파이프라인 고속 FFT 프로세서를 제안한다. 제안하는 구조는 연산과 하드웨어의 최적화를 위해 radix-$2^6$ 알고리즘에 기반하고 있다. 하드웨어 복잡도를 감소시키기 위해서 상수 곱셈기와 교환기 구조를 제안하고 새로운 스케즐링 기법을 적용하였다. 제안하는 FFT 프로세서는 새로운 구조를 적용해 지연 소자와 연산 사이클의 증가 없이 복소 곱셈기 및 연산복잡도를 감소시킬 수 있다. 또한 최적화한 twiddle factor $W_{64}$ 상수 곱셈기는 기존 복소 booth 곱셈기에 비해 65%만의 하드웨어 복잡도를 보였다. 설계한 FFT 프로세서는 Verilog HDL로 모델링하여 IBM 90nm 공정으로 합성하였으며 $0.27mm^2$의 면적과 388MHz의 주파수에서 2.7 GSample/s를 보이고 있다.

정전류다이오드를 이용한 COB 타입 LED 광원 및 조명기기 회로 (Applications of Current Limiting Diode to Chip on Board Type Light Source and Lighting Equipment Circuits)

  • 박화진;유순재;박종민;김윤제
    • 한국전기전자재료학회논문지
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    • 제26권6호
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    • pp.488-492
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    • 2013
  • Current limiting diode (CLD) was fabricated using junction field effect transistor (JFET) structured two small cells and eight large cells. Two small cells and eight large cells were connected in parallel and the obtained constant current was 110 mA. The application of CLD in each of the parallel circuits on chip on board (COB) type LED lighting source, could significantly reduce the current deviation within the parallel circuits. The applications of CLD on AC power small lighting source, battery power low voltage parallel lighting source and AC flat lighting source were investigated.

병렬 유한요소 모형을 이용한 황해의 실시간 조석 및 태풍해일 산정 (Realtime Tide and Storm-Surge Computations for the Yellow Sea Using the Parallel Finite Element Model)

  • 변상신;최병호;김경옥
    • 한국군사과학기술학회지
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    • 제12권1호
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    • pp.29-36
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    • 2009
  • Realtime tide and storm-surge computations for the Yellow Sea were conducted using the Parallel Finite Element Model. For these computations a high resolution grid system was constructed with a minimum node interval of loom in Gyeonggi Bay. In the modeling, eight main tidal constituents were analyzed and their results agreed well with the observed data. The realtime tide computation with the eight main tidal constituents and the storm-surge simulation for Typhoon Sarah(1959) were also conducted using parallel computing system of MPI-based LINUX clusters. The result showed a good performance in simulating Typhoon Sarah and reducing the computation time.

향상된 영상 골격화를 위한 효과적인 병렬 처리 방법 (The Effective Parallel Processing Method for an Enhanced Digital Image of Skeleton Line)

  • 신충호;오무송
    • 한국멀티미디어학회논문지
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    • 제7권4호
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    • pp.459-466
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    • 2004
  • 골격선 추출에 대한 향상된 디지털 이미지를 획득하기 위해서 효과적인 골격화 방법을 제안한다. 제안한 방법은 임계값을 이용한 이진화를 거친 후에 본 방법을 적용하여 영상 골격화 효율을 높이고자 한다. 기존의 골격화 방법은 Rutovits, Stefabelli 그리고 그 외에 5가지 방법을 사용하였다. 기존의 방법은 많은 부분에서 팽창과 잡음가지들이 생성되어 골격화를 이루는데 어려운 점이 많았다. 그러나 제안된 방법은 수정된 병렬처리 단계를 통해서 먼저 문제점들을 제거하였고, 첨가하여 제안된 8가지 제거 조건들에 일치하면 중앙 화소를 제거하여 골격화 품질을 향상시켰다.

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다중 루프문의 병렬처리를 위한 타스크 스케줄링에 관한 연구 (Study on Task Scheduling for Parallel Processing of Nested Loops)

  • 허정연;손윤구
    • 전자공학회논문지B
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    • 제29B권1호
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    • pp.11-17
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    • 1992
  • This paper is to propose an analytical queuing model for parallel processing of sequential program with nested loops. The analytical results are compared with the results from the implemented multiprocessor system composed of four intel 8088 microprocessor, eight 2KB shared common memories, and a hardware token ring. At results, this study shows that the processed results are almost similar in proposed analytical model and real system. Proposed analytical model can be applied to evaluate parallel processing of sequential program with nested loops.

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효율적인 파이프라인 구조와 스케줄링 기법을 적용한 고속 8-병렬 FFT/IFFT 프로세서 (High Speed 8-Parallel Fft/ifft Processor using Efficient Pipeline Architecture and Scheduling Scheme)

  • 김은지;선우명훈
    • 한국통신학회논문지
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    • 제36권3C호
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    • pp.175-182
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    • 2011
  • 본 논문에서는 고속 데이터 전송을 위해 OFDM 시스템에 적용 가능한 고속 FFT/IFFT 프로세서를 제안하였다. 제안하는 프로세서는 높은 데이터 처리율을 만족하기 위해서 MDC 구조와 다중 병렬 처리 기법을 채택하였다. 하드웨어 복잡도를 줄이기 위해서 본 논문에서는 연산에 필요한 연산기의 수를 줄이는 구조로 버터플라이 연산기의 수를 줄인 MRMDC 구조와 효율적인 스케줄링 기법을 적용하여 복소 곱셈기의 수를 줄이는 구조를 제안한다. 제안하는 구조를 적용함으로써 연산 싸이클을 증가시키지 않고 하드웨어 복잡도를 줄일 수 있다. UWB, WiMAX, O-OFDM과 같은 고속 OFDM 시스템을 위해 제안하는 프로세서는 128-포인트와 256-포인트 두 가지 모드를 지원 가능하다. 제안하는 프로세서는 IBM 90nm 공정으로 합성하여 메모리를 제외한 전체 게이트 수가 760,000개를 보이며, 동작속도는 430MHz를 나타내었다.

센서네트워크 활용을 위한 경량 병렬 BCH 디코더 설계 (Design of Lightweight Parallel BCH Decoder for Sensor Network)

  • 최원정;이제훈
    • 센서학회지
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    • 제24권3호
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    • pp.188-193
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    • 2015
  • This paper presents a new byte-wise BCH (4122, 4096, 2) decoder, which treats byte-wise parallel operations so as to enhance its throughput. In particular, we evaluate the parallel processing technique for the most time-consuming components such as syndrome generator and Chien search owing to the iterative operations. Even though a syndrome generator is based on the conventional LFSR architecture, it allows eight consecutive bit inputs in parallel and it treats them in a cycle. Thus, it can reduce the number of cycles that are needed. In addition, a Chien search eliminates the redundant operations to reduce the hardware complexity. The proposed BCH decoder is implemented with VHDL and it is verified using a Xilinx FPGA. From the simulation results, the proposed BCH decoder can enhance the throughput as 43% and it can reduce the hardware complexity as 67% compared to its counterpart employing parallel processing architecture.

병렬형 다리 구조를 가진 2족 보행 로봇의 설계 및 제어 (New Parallel Mechanism for Biped Robots)

  • 윤정한;연제성;권오홍;박종현
    • 대한기계학회:학술대회논문집
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    • 대한기계학회 2004년도 춘계학술대회
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    • pp.810-815
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    • 2004
  • In this paper, we propose new parallel mechanism of a 3 dimensional biped robot whose each leg is composed of two 3-dof parallel platforms linked serially. This proposed parallel mechanism is able to move freely in the man-made environment and is applied to various fields, such as medical, welfare, and so on. And a total weight of each leg is expected to be lighter than serial linked leg. One side leg consists of a 3-dof orientation platform and 3-dof asymmetric parallel platform. The former consists of three active linear actuators and seven passive joints, and the latter of two active linear actuators, one active rotational actuator and eight passive joints. Thus, there are two kinds of parallel platforms each chain's elements and active joint's positions are different for the biped robot to move freely like a serial link without the kinematics constraints. The effectiveness and the performance of the proposed parallel mechanism and locomotion trajectory are shown in computer simulations with a 12-DOF parallel biped robot.

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Complete collapse test of reinforced concrete columns

  • Abdullah, Abdullah;Takiguchi, Katsuki
    • Structural Engineering and Mechanics
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    • 제12권2호
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    • pp.157-168
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    • 2001
  • In this paper, experimental investigation into the behavior of reinforced concrete (RC) columns tested under large lateral displacement with four different types of loading arrangements is presented. Each loading arrangement has a different system for controlling the consistency of the loading condition. One of the loading arrangements used three units of link mechanism to control the parallelism of the top and bottom stub of column during testing, and the remaining employed eight hydraulic jacks for the same purpose. The loading systems condition used in this investigation were similar to the actual case in a moment-resisting frame where the tested column was displaced in a double curvature. Ten model column specimens, divided into four series were prepared. Two columns were tested monotonically until collapse, and unless failure took place at an earlier stage of loading, the remaining eight columns were tested under cyclic loading. Test results indicated that the proposed system to keep the top and bottom stubs parallel during testing performed well.

Middle Cerebral Artery Duplication : Classification and Clinical Implications

  • Chang, Hoe-Young;Kim, Myoung-Soo
    • Journal of Korean Neurosurgical Society
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    • 제49권2호
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    • pp.102-106
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    • 2011
  • Objective : Although there are several explanations for a duplicated middle cerebral artery (DMCA), its embryological origin is still an open question. We reviewed these anomalous vessels to postulate a theory of their different origins, sizes, and courses. Methods : A retrospective review of 1,250 cerebral angiographies, 1,452 computed tomography (CT)-angiographies, and 2,527 magnetic resonance (MR)-angiographies was performed to identify patients with DMCA. Results : Twenty-five patients had 25 DMCAs. Conventional angiography detected nine patients with DMCA (9/1250, 0.72%), MR-angiography detected seven patients with DMCA 0.28%), and CT-angiography detected nine patients with DMCA (9/1452, 0.62%). The DMCAs originated near the internal carotid artery terminal in eight patients (type A), and between the origin of the anterior choroidal artery and the terminal internal carotid artery in 17 patients (type B). The diameters of the eight type A DMCAs were the same or slightly smaller than those of the other branch of the DMCA. All type A DMCAs showed a course parallel to that of the other branch of the DMCA. The diameters of the 17 type B DMCAs were the same, slightly smaller, or very much smaller than that of the other branch of the DMCA. Nine type B DMCAs showed parallel courses, and the other eight curved toward the temporal lobe. Conclusion : The two branches of the type A DMCAs can be regarded as early bifurcations of the MCA. The branches of the type B DMCAs had parallel courses or a course that curved toward the temporal lobe. The type B DMCA can be regarded as direct bifurcations of the MCA trunk or the early ramification of the temporal branch of the MCA.