• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.4
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• pp.201-208
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• 2017

Recently, the installation of photovoltaic(PV) systems has been increasing due to the worldwide interest in eco-friendly and abundant solar energy. On the other hand, a PV system has approximately 25% power loss while the energy generated from solar cells is transformed to the power coupling point through a power conversion system (DC/AC). If the output voltage of a string in the PV system is lower than the operating range of the inverter when a part of module in the string has a shadow due to weather conditions, the string is not synchronized and the whole efficiency of output power in a PV system may be reduced significantly. Therefore, to overcome this problem, this paper proposes a novel control method to compensate for the lower voltage by introducing a DC/DC voltage regulator for each string in a PV system, which adopts a concept for MPPT (Maximum Power Point Tracking) control function using the P&O algorithm and adopts constant voltage control method used in an existing inverter. This paper also implements a 2kW DC/DC voltage regulator based on the proposed algorithm and performs a variety of scenario-based experiments. From the simulation result, it was confirmed that the operation efficiency in the proposed method is improved compared to the existing method.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.3
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• pp.75-80
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• 2019

Silicon solar cells have been widely used as a most promising renewable energy source due to eco-friendliness and high efficiency. As modules of silicon solar cells are connected in series for a practical electricity generation, a large voltage of 500-1,500 V is applied to the modules inevitably. Potential-induced degradation (PID), a deterioration of the efficiency and maximum power output by the continuously applied high voltage between the module frames and solar cells, has been regarded as the major cause that reduces the lifetime of silicon solar cells. In particular, the migration of the $Na^+$ ions from the front glass into Si through the anti-reflection coating and the accumulation of $Na^+$ ions at stacking faults inside Si have been reported as the reason of PID. In this research, the thickness effect of $SiO_x$ layer that can block the migration of $Na^+$ ions on the reduction of PID is investigated as it is incorporated between anti-reflection coating and p-n junction in p-type PERC solar cells. From the measurement of shunt resistance, efficiency, and maximum power output after the continuous application of 1,000 V for 96 hours, it is revealed that the thickness of $SiO_x$ layer should be larger than 7-8 nm to reduce PID effectively.