• Journal of the Semiconductor & Display Technology
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• v.8 no.4
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• pp.77-82
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• 2009

In robot operation, a motor with multi-degree of freedom motion control and an encoder for motor control are needed. To perform precise motion, location, and velocity control, the operation of motor and encoder with superior performance is important. In this paper, we studied performance evaluation system that can evaluate the performance of motor and encoder. The performance of motor and encoder can be evaluated in terms of disconnection check, signal variation count, and U, V, W signal check. Disconnection check verifies signal connection between a motor and an encoder, signal variation check verifies A, B signal by counting the number of signal A, B when a motor revolves, and U, V, W signal check verifies operating direction of a motor. The result is shown at graphic LCD integrated in system, and can be checked in PC with PC communication.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.100-103
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• 2008

In this paper, we propose H.264 Encoder integrating Intra Prediction, Deblocking filter, Context-Based Adaptive Variable Length Coding, and Motion Estimation encoder module. This designed module can be operated in 440 cycle for one-macroblock. To verify the Encoder architecture, we developed the reference C from JM 9.4 and verified the our developed hardware using test vector generated by reference C. The designed circuit can be operated in 166MHz clock system, and has 1800k gate counts using Charterd 0.18um process including SRAM memory. Manufactured chip has the size of $6{\times}6mm$ and 208 pins package.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.9 no.1
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• pp.1-10
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• 1984

The time division multiplexing PCM encoder which is constructed for an airborne telemetering system is investigated. Selected by program switch, the PCM encoder has 0~64 words/framd($\pm$5V full scale) of allowable analog input channels, 0~30bits(5V$\pm$1V or 0V$\pm$1V dc) of discrete channels, 70 and 140K bits/sec of bit rate and 8~12bits/word of resolution. And filtered output PCM code is NRZ-L and Bi-S through the 5 pole Bessel LPF(f=100kHz), and the maximum accuracy of PCM encoder is $\pm$0.2% of its full scale.

• International Journal of Precision Engineering and Manufacturing
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• v.8 no.2
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• pp.20-25
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• 2007

This paper describes a second-generation dual sine-grid surface encoder for 2-D position measurements. The surface encoder consisted of a 2-D grid with a 2-D sinusoidal pattern on its surface, and a 2-D angle sensor that detected the 2-D profile of the surface grid The 2-D angle sensor design of previously developed first-generation surface encoders was based on geometric optics. To improve the resolution of the surface encoder, we fabricated a 2-D sine-grid with a pitch of $10{\mu}m$. We also established a new optical model for the second-generation surface encoder that utilizes diffraction and interference to generate its measured values. The 2-D sine-grid was fabricated on a workpiece by an ultra precision lathe with the assistance of a fast tool servo. We then performed a UV-casting process to imprint the sine-grid on a transparent plastic film and constructed an experimental setup to realize the second-generation surface encoder. We conducted tests that demonstrated the feasibility of the proposed surface encoder model.

• Journal of Broadcast Engineering
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• v.17 no.6
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• pp.1091-1105
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• 2012

In this paper, we analyzed statistical characteristics and complexity of HEVC encoder as a leading research of acceleration, optimization and parallelization. Computational complexity of the HEVC encoder is approximately twice the compression performance compared to H.264/AVC. But, the increase of encoder complexity remains a problem to be solved in the future. Before performing the research on acceleration, optimization and parallelization to reduce high complexity of HEVC encoder, we measure the complexity each module for HEVC encoder using it's reference software HM 7.1. We also measured the predicted complexity of fast HEVC encoder software, used in real applications, using HM 7.1 applying fast encoding method. The complexity is measured in terms of the operating cycle of the encoder software under the common test sequences and conditions in the Windows PC environment. In addition, we analyze statistical characteristics of HEVC encoder software according to encoding structures and limitation using coded bitstreams.

• Proceedings of the KIEE Conference
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• 2002.07b
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• pp.1003-1005
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• 2002

In general, to get the accurate switching point of power electronic components is dependent on a given rotor position by the encoder. However, a conventional encoder may not be used to detect position and speed of the developed motor due to the very high speed. Thus, an encoder that uses the hall effect directly was designed and applied. This paper presents the developed encoder that meet requirement of military purpose. To confirm the developed encoder, the experimental results are shown.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.8 no.1
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• pp.75-81
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• 2008

This paper presents a top-down approach to implement an MPEG-2 audio encoder in VLSI. As the algorithm of an MPEG-2 audio encoder is heavy-weighted and heterogeneous(to be mixture of several strategies), the encoder design process is undertaken carefully from the algorithmic level to the architectural level. Firstly, the encoding algorithm is analyzed and divided into sub-algorithms, called tasks, and the tasks are partitioned in the way of reusing the same designs. Secondly, the partitioned tasks are scheduled and synthesized to make the most efficient use of time and space. In the end, a real-time 5 channel MPEG-2 audio encoder is designed which is a heterogeneous multiprocessor system; two hardwired logic blocks and one specialized DSP processor.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2005.06a
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• pp.260-264
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• 2005

This paper describes the ultra precise position control of servo motor using sinusoidal encoder based on 'Arcsine Interpolation Method'. First, the paper theoretically analyzes and verify throughout experiments, the relationship between A/D converter input ripple and the total resolution to measure the precise position. Second, this paper presents a way to compensate the total gain and offset error by utilizing a low cost programmable differential amp, by which without any special expensive equipments they are easily on-line tuned and effectively compensated. Lastly, it was compared to servomotor position control characteristics using digital incremental 50,000ppr encoder. The test results show that, with much cheaper sinusoidal encoder, the proposed method exhibits better performance both in position control and ASD applications than the 50,000ppr optical encoder.

• International Journal of Contents
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• v.9 no.1
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• pp.33-37
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• 2013

BCH code is one of the most widely used error correcting code for the detection and correction of random errors in the modern digital communication systems. The conventional BCH encoder that is operated in bit-serial manner cannot adequate with the recent high speed appliances. Therefore, parallel encoding algorithms are always a necessity. In this paper, we introduced a new systolic array type BCH parallel encoder. To study the area and speed, several parallel factors of the systolic array encoder is compared. Furthermore, to prove the efficiency of the proposed algorithm using tree-type structure, the throughput and the area overhead was compared with its counterparts also. The proposed BCH encoder has a great flexibility in parallelization and the speed was increased by 40% than the original one. The results were implemented on synthesis and simulation on FPGA using VHDL.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.9 no.3
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• pp.103-110
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• 2000

Shaft encoder which encodes the rotational angle of a shaft becomes more important recently due to factory automation and office automation. Although an absolute type encoder is more dsirable due to its convenience an incremental encoder is commonly used because of its cost and technical difficulties Fabricating a high resolution absolute encoder is very diff-cult because the physical size is limited by currently available technology. In order to overcome this difficulty Moire fringe can be used incorporated with gray code. In order to measure the position of fringes which move as the code disk rotates a neural network was developed in this paper. Formerly fringe position is usually measured by a sophisticated software which needs a little long calculation time. However using nerual network method can eliminate such calculation time even though it needs learning job The pro-posed method is verified through several experiments.