• Transactions on Electrical and Electronic Materials
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• v.6 no.5
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• pp.225-228
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• 2005

In this work, we studied the optimized copper thickness in Cu ECP (Electrochemical Plating). In order to select an optimized Cu ECP thickness, we examined Cu ECP bulge (bump, hump or over-plating amount), Cu CMP dishing and electrical properties of via hole and line trench over dual damascene patterned wafers split into different ECP Cu thickness. In the aspect of bump and dishing, the bulge increased according as target plating thickness decreased. Dishing of edge was larger than center of wafer. Also in case of electrical property, metal line resistance distribution became broad gradually according as Cu ECP thickness decreased. In conclusion, at least $20\%$ reduced Cu ECP thickness from current baseline; $0.8\;{\mu}m$ and $1.0\;{\mu}m$ are suitable to be adopted as newly optimized Cu ECP thickness for local and intermediate layer.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.93-94
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• 2005

Cu metallization using electrochemical plating(ECP) has played an important role in back end of line(BEOL) interconnect formation. In this work, we studied the optimized copper thickness using Bottom-up Gap-fill in Cu ECP, which is closely related with the pattern dependencies in Cu ECP and Cu dual damascene process at 0.13 ${\mu}m$ technology node. In order to select an optimized Cu ECP thickness, we examined Cu ECP bulge, Cu CMP dishing and electrical properties of via hole and line trench over dual damascene patterned wafers split into different ECP Cu thickness.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.125-126
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• 2005

Recently semiconductor devices are required more smaller scale and more powerful performance. For smaller scale of device, multilayer structure is proposed. And, for the higher performance, interconnection material is change to copper, because copper has high EM(Electro-migration)and low resistivity. Then copper CMP process is a great role in a multilayer formation of semiconductor. Copper process is different from aluminum process. ECP process is one of the copper processes. In this paper, we focused on the defects tendency by copper thickness which filled using ECP process. we observed hump high and dishing. Conclusively, hump hight reduced at copper thickness increased Also dishing reduced.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.252-255
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• 2004

반도체는 high integrated, high speed, low power를 위하여 design 뿐만 아니라 재료 측면에서도 많은 변화를 가져오고 있으며, RC delay time을 줄이기 위하여 Al 배선보다 비저항이 낮은 Cu와 low-k material 적용이 그 대표적인 예이다. 그러나, Cu 배선의 경우 dry etching이 어려우므로, 기존의 공정으로는 그 한계를 가지므로 damascene 또는 dual damascene 공정이 소개, 적용되고 있다. Damascene 공정은 절연막에 photo와 RIE 공정을 이용하여 trench를 형성시킨 후 electrochemical plating 공정을 이용하여 trench에 Cu를 filling 시킨다. 이후 CMP 공정을 이용하여 절연막 위의 Cu와 barrier material을 제거함으로서 Cu 배선을 형성하게 된다. Dual damascene 공정은 trench와 via를 동시에 형성시키는 기술로 현재 대부분의 Cu 배선 공정에 적용되고 있다. Cu CMP는 기존의 metal CMP와 마찬가지로 oxidizer를 이용한 Cu film의 화학반응과 연마 입자의 기계가공이 기본 메커니즘이다. Cu CMP에서 backside pressure 영향이 uniformity에 미치는 영향을 살펴보았으며, electrochemical plating 공정에서 발생하는 hump가 CMP 결과에 미치는 영향과 dishing 결과를 통하여 그 영향을 평가하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.12-12
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• 2008

Ruthenium is one of the noble metals having good thermal and chemical stability, low resistivity, and relatively high work function(4.71eV). Because of these good physical, chemical, and electrical properties, Ru thin films have been extensively studied for various applications in semiconductor devices such as gate electrode for FET, capacitor electrodes for dynamic random access memories(DRAMs) with high-k dielectrics such as $Ta_2O_5$ and (Ba,Sr)$TiO_3$, and capacitor electrode for ferroelectric random access memories(FRAMs) with Pb(Zr,Ti)$O_3$. Additionally, Ru thin films have been studied for copper(Cu) seed layers for Cu electrochemical plating(ECP) in metallization process because of its good adhesion to and immiscibility with Cu. We investigated Ru thin films by thermal ALD with various deposition parameters such as deposition temperature, oxygen flow rate, and source pulse time. Ru thin films were grown by ALD(Lucida D100, NCD Co.) using RuDi as precursor and $O_2$ gas as a reactant at 200~$350^{\circ}C$.