• 한국정보통신설비학회:학술대회논문집
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• 2009.08a
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• pp.242-247
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• 2009

In this paper, we investigate interference between short-range radiocommunication devices (SRDs) with frequency hopping spread spectrum (FHSS) and direct sequence spread spectrum (DSSS) methods when they are in the same frequency bands. In order to analyze interference from unwanted emission of SRD with DSSS to that of FHSS, Monte-Carlo (MC) simulation method is employed and interference probabilities are calculated. We simulate interference scenarios in accordance with several duty cycles and bandwidths. It is also assumed that the propagation model is free space The effect of distance between interfering transmitter and victim receiver is analyzed and bit error rate (BER) is simulated. From the interference analysis results, it is shown that duty cycle affects compatibility more than bandwidth does. Also, we can make sure of the separation distance which satisfies BER criterion when there are only one interfering transmitter and multiple interfering transmitters.

• Journal of ILASS-Korea
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• v.18 no.3
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• pp.132-139
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• 2013

Smoke emissions from light duty diesel vehicles were measured using light extinction method with the free acceleration test mode. The smoke emissions for each measurement cycle of the free acceleration method showed large variations according to driver's pedal pushing pattern. The smoke values for each measurement cycle initially increased and reach a peak value. Integration of the smoke emissions with time for each measurement cycle was performed to get a representative smoke value which was obtained by averaging the integrated results. Two kinds of integration time range were used. One is range over the whole measurement cycle of the free acceleration method. The other is only the acceleration range in the measurement cycle. Overall, variation of the representative smoke values obtained by the integration method was reduced comparing to the traditional representative smoke value which was obtained from a peak smoke value over the measurement cycle. Ten vehicles of the same model with 2.5 liter diesel engines, and seven vehicles of the same model with 2.7 liter diesel engines, were tested using the free acceleration test method.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.5C
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• pp.500-505
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• 2002

In this paper, a novel architecture of programmable divider with fifty percent duty cycle output and programmable dividing number has been proposed. Through HSPICE simulation, a 900MHz frequency synthesizer with proposed frequency divider has designed in a standard 0.25$\mu\textrm{m}$ CMOS technology. To verify the operation of proposed frequency divider, a chip had been fabricated using 0.65$\mu\textrm{m}$ 2-poly, 3-metal standard CMOS processing and experimental result shows that the proposed frequency divider works well. The designed voltage controlled oscillator(VCO) has a center frequency of 900MHz, a tuning range of ${\pm}$10%, and a gain of 154MHz/V. The simulated frequency synthesizer performance has a settling time of 1.5${\mu}\textrm{s}$, a frequency range from 820MHz to 1GHz and power consumption of 70mW at 2.5V power supply voltage.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.6C
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• pp.619-624
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• 2002

In this paper, a novel architecture of programmable divider with fifty percent duty cycle output and programmable dividing number has been proposed. Through HSPICE simulation, a 900MHz frequency synthesizer with proposed (sequency divider has designed in a standard 0.25㎛ CMOS technology To verify the operation of proposed frequency divider, a chip had been fabricated using 0.65㎛ 2-poly, 3-metal standard CMOS processing and experimental result shows that the proposed frequency divider works well. The designed voltage controlled oscillator(VCO) has a center frequency of 900MHz a tuning range of $\pm$10%, and a gain of 154HHz/V. The simulated frequency synthesizer performance has a settling time of 1.5$\mu$s, a frequency range from 820MHz to IGHz and power consumption of 70mW at 2.5V power supply voltage.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.2 s.332
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• pp.23-30
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• 2005

This paper describes a DLL(delay locked loop)-based multi-clock generator having the lower active stand-by power as well as a fast relocking after re-activating the DLL. for low power and high speed VLSI chip. It enables a frequency multiplication using frequency multiplier scheme and produces output clocks with 50:50 duty-ratio regardless of the duty-ratio of system clock. Also, digital control scheme using DAC enables a fast relocking operation after exiting a standby-mode of the clock system which was obtained by storing analog locking information as digital codes in a register block. Also, for a clock multiplication, it has a feed-forward duty correction scheme using multiphase and phase mixing corrects a duty-error of system clock without requiring additional time. In this paper, the proposed DLL-based multi-clock generator can provides a synchronous clock to an external clock for I/O data communications and multiple clocks of slow and high speed operations for various IPs. The proposed DLL-based multi-clock generator was designed by the area of $1796{\mu}m\times654{\mu}m$ using $0.35-{\mu}m$ CMOS process and has $75MHz\~550MHz$ lock-range and maximum multiplication frequency of 800 MHz below 20psec static skew at 2.3v supply voltage.

• Journal of Power Electronics
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• v.15 no.5
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• pp.1200-1206
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• 2015

This paper proposes an actively clamped two-switch flyback converter. Compared to the conventional two-switch flyback converter, the proposed two-switch flyback converter operates with a wide duty cycle range. By using an active-clamp circuit, the proposed converter achieves zero-voltage switching for all of the power switches. Zero-current switching of an output diode is also achieved. Thus, compared with the conventional converter, the proposed converter realizes a higher efficiency with an extended duty cycle. The performance of the proposed converter is verified by the experimental results with use of a 1.0 kW prototype circuit.

• Proceedings of the KIPE Conference
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• 2017.11a
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• pp.111-112
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• 2017

This paper presents a novel three-port converter for the OnBoard Charger of Electric Vehicles by using an impedance control network. The proposed concept is suitable for charging a main battery and an auxiliary battery of an electric vehicle at the same time due to its power handling capability of the converter without additional switches. The power flow is managed by the phase angle (${\Theta}$) between the ports whereas voltage at each port is controlled by the asymmetric duty cycle and the phase shift (${\Phi}$) between the inverter lags controlled by the impedance control network. The proposed system has a capability of achieving zero voltage switching (ZVS) and zero current switching (ZCS) at all the switches over the wide range of input voltage, output voltage and output power. The feasibility of the proposed system is verified by the PSIM simulation.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.10a
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• pp.780-783
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• 2010

Net residual dispersion (NRD) available to transmit RZ formats with different 24 wavelength as a function of duty cycles of RZ format and residual dispersion per span (RDPS) is induced by controlling precompensation only in 960 km optical transmission links of single mode fiber (SMF) with inline dispersion management (DM) for compensating of accumulated dispersion. It is confirmed that effective NRD range for different 24 wavelengths is gradually broadening as RDPS is more smaller, and as duty cycle of RZ format is more larger in the same RDPS.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.965_966
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• 2009

In this paper, a new soft-switching Two-switch Forward converter topology has been proposed. Compared with conventional two-switch forward converter, the proposed converter employs an auxiliary switch and a clamp capacitor to instead of two reset diodes, not only its duty cycle can exceed 0.5 to achieve wide range input voltage, but also soft switching can be achieved for all switches. Especially, voltage stress across main switches can be clamped at $1/2V_{in}$, voltage stress across auxiliary switch can be clamped at $V_{in}$. In addition, due to clamp capacitor series with the transformer, duty ratio can be extended with equation $V_o=\frac{V_{in}(1-D}D{N}$. Therefore, as a kind of better cost-effective approach, it is very attractive for high input, wide range and high efficiency application.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.48 no.9
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• pp.510-516
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• 1999

In this paper, a new high-powerfactor control method for boost-type rectifier is proposed, which removes the necessity of input current sensing. This method generates a sinewave duty template only from the line voltage waveform and rectifier output, and reduces reactive power remarkably utilizing three compensation coefficients which are determined through experiments. These compensations make the input current to be in phase with the input voltage all over the load range. A prototype boost-type rectifier is designed and experimental results are presented.