• Title/Summary/Keyword: Dual Redundancy Design

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Fault Detection System Design and HILS Evaluation for the Smart UAV FCS

  • Nam, Yoon-Su;Jang, Hu-Yeong;Hong, Sung-Kyung;Park, Sung-Su
    • International Journal of Control, Automation, and Systems
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    • v.5 no.1
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    • pp.104-109
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    • 2007
  • This paper is about a redundancy management system design for the Smart UAV(unmanned aerial vehicle) which utilizes the tilt..rotor mechanism. In order to meet the safety requirement on the PLOC(probability of loss of control) of $1.7{\times}10^{-5}$ per flight hour for FCS (flight control system) failures, a digital FCS is mechanized with a dual redundant structure. A fault detection system which is composed of a CCM(cross channel monitor) and analytic redundancy using the Kalman filtering is designed, and its effectiveness is evaluated through experiments. A threshold level and persistence count for managing redundant sensors are designed based on the statistical analysis of the FCS sensors. To increase the survivability of the UAV after the loss of critical sensors in the SAS(stability augmentation system) and to provide reference information for a tie-breaking condition at which an ILM(in-line monitor) cannot distinguish the faulty channel between two operating ones, the Kalman filter approach is investigated.

Design of a Delayed Dual-Core Lock-Step Processor with Automatic Recovery in Soft Errors (소프트 에러 발생 시 자동 복구하는 이중 코어 지연 락스텝 프로세서의 설계)

  • Juho Kim;Seonghyun Yang;Seongsoo Lee
    • Journal of IKEEE
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    • v.27 no.4
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    • pp.683-686
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    • 2023
  • In this paper, we designed a Delayed Dual Core Lock-Step (D-DCLS) processor where two cores operate same instructions with delay and the result is compared to mitigate soft errors and common mode failures in automotive electronic systems. Because D-DCLS does not know which core an error occurred in, each core must be recovered to the point before the error occurred, but complex hardware modifications are required to return all intermediate values on the pipeline stage. In this paper, in order for easy hardware implementation, all register values are saved to a buffer whenever a branch instruction is executed. When an error is detected, the saved register values are automatically restored, and then 'BX LR' instruction is executed to return to the last branch point. The proposed D-DCLS processor was designed using Verilog HDL and was confirmed to continue normal operation after automatically recovering error.

Development of the High Reliable Safety PLC for the Nuclear Power Plants (고신뢰도 안전등급 제어기기 개발)

  • Son, Kwang-Seop;Kim, Dong-Hoon;Son, Choul-Woong
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.62 no.1
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    • pp.109-119
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    • 2013
  • This paper presents the design of the Safety Programmable Logic Controller (SPLC) used in the Nuclear Power Plants, an analysis of a reliability for the SPLC using a markov model. The architecture of the SPLC is designed to have the multiple modular redundancy composed of the Dual Modular Redundancy(DMR) and the Triple Modular Redundancy(TMR). The operating system of the SPLC is designed to have the non-preemptive state based scheduler and the supervisory task managing the sequential scheduling, timing of tasks, diagnostic and security. The data communication of the SPLC is designed to have the deterministic state based protocol, and is designed to satisfy the effective transmission capacity of 20Mbps. Using Markov model, the reliability of SPLC is analyzed, and assessed. To have the reasonable reliability such as the mean time to failure (MTTF) more than 10,000 hours, the failure rate of each SPLC module should be less than $2{\times}10^{-5}$/hour. When the fault coverage factor (FCF) is increased by 0.1, the MTTF is improved by about 4 months, thus to enhance the MTTF effectively, it is needed that the diagnostic ability of each SPLC module should be strengthened. Also as the result of comparison the SPLC and the existing safety grade PLCs, the reliability and MTTF of SPLC is up to 1.6-times and up to 22,000 hours better than the existing PLCs.

A New ZVS Bi-directional CUK DC/DC Converter for a Car Dual Power Supply System (자동차 이중전원 시스템을 위한 새로운 ZVS 양방향 CUK DC/DC 컨버터)

  • Lee S. R.;Lee S. W.;Ko S. H.;Mun J. M.
    • Proceedings of the KIPE Conference
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    • 2004.07a
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    • pp.355-358
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    • 2004
  • Currently, to overcome the limit of a 14V power supply system and to enhance the stability of this system high and to make the fuel efficiency better, a research development of a 42V power supply system is actively the progress. As an intermediate step to change into an unity power supply system, a 42V/14V dual power supply system uses a DC/DC Converter as one of structure elements. Considering the main electric power sources in the next generation of the car is a 42V system a 14V power supply system has advantages as follows : In be managed efficiently and to increase the redundancy at start, to jump start with any vehicles, etc. We need the introduction of a hi-directional converter that can flow the energy each other in a dual 42V-l2V system. This paper proposed the ZVS hi-directional CUK DC/DC converter which decrease the weight with the size of the DC/DC Converter and minimize the loss when the switching happen. In this paper, a circuit design method and an action principle of the circuit was proposed. To verify the proposed circuit, a comprehensive evaluation with theoretical analysis, simulation results is presented.

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Design and Performance Test of 10,000 lbf-in Class Dual Redundant Hinge Line Electro-Mechanical Actuator System (10,000 lbf-in급 힌지라인 이중화 전기식 구동장치 설계 및 성능평가)

  • Jeong, Seuhg-Ho;Seol, Jin-Woon;Heo, Seok-Haeng;Lee, Byung-Ho;Cho, Young-Ki
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.47 no.2
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    • pp.153-160
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    • 2019
  • Electro-mechanical actuator system for aircraft has advantages in compactness and its lightweight, compared to the hydraulic actuator system. Hinge line actuator has low air resistance and is suitable for special purpose such as stealth. This paper describes design contents of 10,000 lbf-in class dual redundant hinge line electro-mechanical actuator system for performance test. The control structure was designed to minimize impact of torque fighting. A mathematical model is proposed to analyze and validate the performances of actuator by comparison with experiment results.

Fixed Decision Delay Detector for Intersymbol Interference Channel (심볼간 간섭 채널을 위한 고정 지연 신호 검출기)

  • Taehyun, Jeon
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.41 no.9
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    • pp.39-45
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    • 2004
  • A design method is proposed for the sequence detection with fixed decision delay with less hardware complexity using the concept of the Voronoi diagram and its dual, the Delaunay tessellation. This detector design is based on the Fixed Delay Tree Search (FDTS) detection. The FDTS is a computationally efficient sequence detection algerian and has been shown to achieve near-optimal performance in the severe Intersymbol Interference (ISI) channels when combined with decision feedback equalization and the appropriate channel coding. In this approach, utilizing the information contained in the Voronoi diagram or equivalently the Delaunay tessellation, the relative location of the detector input sequence in the multi-dimensional Euclidean space is found without any computational redundancy, which leads to a reduced complexity implementation of the detector.

A Fault Monitor Design for the Driving Currents of a DDV Actuation System of a FBW Aircraft (FBW 항공기의 DDV 구동장치에 대한 구동전류 고장 모니터 설계)

  • Nam, Yun-Su;Park, Hae-Gyun;;Choe, Seop;Gwon, Jong-Gwang
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.34 no.3
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    • pp.81-86
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    • 2006
  • This paper deals with a driving current fault monitor design methodology for a DDV actuation system which has a dual hydraulic power supply system, and triplex electric control capability. A fault existing among these redundant channels should be detected accurately and removed timely, and the remaining channels are to be reconfigured in order to compensate the role of a removed faulty channel. An integrated analysis on the aerodynamics, flight control laws, and DDV actuation system is essential for the design of an actuation system fault monitor. A method to define a fault transient boundary which specifies a maximum travel of an actuation system caused by the first faulty operation is proposed based on the top level requirement on the fault effect specified in MIL-F-8785C.