• Title/Summary/Keyword: Dual Redundancy

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Redundancy of Dual and Steel Moment Frame Systems under Earthquakes

  • Song, S.H.;Wen, Y.K.
    • Computational Structural Engineering : An International Journal
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    • v.1 no.2
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    • pp.137-137
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    • 2001
  • The reliability/redundancy of structural system has become a serious concern among engineers and researchers after structural failures in Northridge and Kobe earthquakes. The reliability/redundancy factor, ρ, in current codes considers only member force and floor area and has received much criticism from dissatisfied engineers. Within a reliability framework. the redundancy is investigated for dual systems of primary shear walls and secondary moment frames and steel moment frame systems. Probabilistic performance analyses are carried out baled on nonlinear responses under SAC ground motion. The effects of structural configuration, ductilily capacity, 3-D motion, and uncertainty of demand verses capacity are investigated. Important redundancy-contributing factors are identified and a uniform-risk redundancy factor is developed for design. The result are compared with the p factor and its inconsistency is pointed out.

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Performance Analysis of Checkpointing and Dual Modular Redundancy for Fault Tolerance of Real-Time Control System (실시간 제어 시스템의 결함 극복을 위한 이중화 구조와 체크포인팅 기법의 성능 분석)

  • Ryu, Sang-Moon
    • Journal of Institute of Control, Robotics and Systems
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    • v.14 no.4
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    • pp.376-380
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    • 2008
  • This paper deals with a performance analysis of real-time control systems, which engages DMR(dual modular redundancy) to detect transient errors and checkpointing technique to tolerate transient errors. Transient errors are caused by transient faults and the most significant type of errors in reliable computer systems. Transient faults are assumed to occur according to a Poisson process and to be detected by a dual modular redundant structure. In addition, an equidistant checkpointing strategy is considered. The probability of the successful task completion in a real-time control system where periodic checkpointing operations are performed during the execution of a real-time control task is derived. Numerical examples show how checkpoiniting scheme influences the probability of task completion. In addition, the result of the analysis is compared with the simulation result.

Experimental study on cyclic behavior of reinforced concrete parallel redundancy walls

  • Lua, Yiqiu;Huang, Liang
    • Structural Engineering and Mechanics
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    • v.52 no.6
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    • pp.1177-1191
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    • 2014
  • Reinforced concrete (RC) shear walls are one of the most commonly used lateral-load resisting systems in high-rise buildings. RC Parallel redundancy walls studied herein consist of two parts nested to each other. These two parts have different mechanical behaviors and energy dissipation mechanisms. In this paper, experimental studies of four 1/2-scale specimens representing this concept, which are subjected to in-plane cyclic loading, are presented and test results are discussed. Two specimens consist of a wall frame with barbell-shaped walls embedded in it, and the other two consist of a wall frame and braced walls nested each other. The research mainly focuses on the failure mechanism, strength, hysteresis loop, energy dissipation capacity and stiffness of these walls. Results show that the RC parallel redundancy wall is an efficient lateral load resisting component that acts as a "dual" system with good ductility and energy dissipation capacity. One main part absorbs a greater degree of the energy exerted by an earthquake and fails first, whereas the other part can still behave as an independent role in bearing loads after earthquakes.

A Study on the Design and Evaluation of Dual-Duplex System (듀얼 듀플렉스 시스템 설계 및 평가에 관한 연구)

  • Kim, Hyun-Ki;Shin, Duck-Ho;Lee, Key-Seo
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.50 no.4
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    • pp.168-176
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    • 2001
  • In this paper, we develop a dual-duplex system which detects a fault by hardware comparator and switches to hot standby redundancy. This system is designed on the basis of MC68000 and can be used in VMEbus. To improve reliability, the dual-duplex system is designed in dual modular redundancy. The failure rate of electrical element is calculated in MILSPEC-217F, and the system RAMS(Reliability, Availiability, Maintainability and Safety) and MTTF(Mean Time to Failure) are evaluated by Markov modeling method. As the evaluation result shows improved reliability, it can be used as a component hardware for a highly reliable control system.

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Inverse Kinematics Solution and Optimal Motion Planning for Industrial Robots with Redundancy (여유 자유도를 갖는 산업용 로봇의 역기구학 해석 및 최적 동작 계획)

  • Lee, Jong-Hwa;Kim, Ja-Young;Lee, Ji-Hong;Kim, Dong-Hyeok;Lim, Hyun-Kyu;Ryu, Si-Hyun
    • The Journal of Korea Robotics Society
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    • v.7 no.1
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    • pp.35-44
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    • 2012
  • This paper presents a method to optimize motion planning for industrial manipulators with redundancy. For optimal motion planning, first of all, particular inverse kinematic solution is needed to improve efficiency for manipulators with redundancy working in various environments. In this paper, we propose three kinds of methods for solving inverse kinematics problems; numerical and combined approach. Also, we introduce methods for optimal motion planning using potential function considering the order of priority. For efficient movement in industrial settings, this paper presents methods to plan motions by considering colliding obstacles, joint limits, and interference between whole arms. To confirm improved performance of robot applying the proposed algorithms, we use two kinds of robots with redundancy. One is a single arm robot with 7DOF and another is a dual arm robot with 15DOF which consists of left arm, right arm with each 7DOF, and a torso part with 1DOF. The proposed algorithms are verified through several numerical examples as well as by real implementation in robot controllers.

Design and Integration of a Dual Redundancy Air Data System for Unmanned Air Vehicles (무인항공기 이중화 대기자료시스템 설계 및 통합 연구)

  • Won, Dae-Yeon;Yun, Seonghun;Lee, Hongju;Hong, Jin-Sung;Hwang, Sun-Yu;Lim, Heung-Sik;Kim, Taekyeum
    • Journal of the Korea Institute of Military Science and Technology
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    • v.23 no.6
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    • pp.639-649
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    • 2020
  • Air data systems measure airspeed, pressure altitude, angle of attack and angle of sideslip. These measurements are essential for operating flight control laws to ensure safe flights. Since the loss or corruption of air data measurements is considered as catastrophic, a high level of operational reliability needs to be achieved for air data systems. In the case of unmanned air vehicles, failure of any of air data sensors is more critical due to the absence of onboard pilot decision aid. This paper presents design of a dual redundancy air data system and the integration process for an unmanned air vehicle. The proposed dual-redundant architecture is based on two independent air data probes and redundancy management by central processing in two independent flight control computers. Starting from unit testing of single air data sensor, details are provided of system level tests used to meet overall requirements. Test results from system integration demonstrate the efficiency of the proposed process.

DSCM (Dual Switching Control Module) Design to Heighten Reliability of System (시스템의 신뢰도를 높이기 위한 교환제어모듈 설계)

  • Jeong, Eui-Kuk;Chang, Kyung-Bae;Shim, Il-Joo;Park, Gwi-Tae
    • Proceedings of the KIEE Conference
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    • 2004.07d
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    • pp.2606-2609
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    • 2004
  • As computer system has developed, the break down rate of system has been increased. So, engineers have been interested in reliability of system. General method that is used to heighten reliability of system is Redundancy of System by dual switching control. In this paper, we propose DSCM which can give Redundancy structure in existent PC(Microsoft Window 2000 OS) base system. And we experiment redundancy structure that is applied DSCM to currently using train control in IFC(Interface Computer) system.

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Fault Recovery and Optimal Checkpointing Strategy for Dual Modular Redundancy Real-time Systems (중복구조 실시간 시스템에서의 고장 극복 및 최적 체크포인팅 기법)

  • Kwak, Seong-Woo
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.7 s.361
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    • pp.112-121
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    • 2007
  • In this paper, we propose a new checkpointing strategy for dual modular redundancy real-time systems. For every checkpoints the execution results from two processors, and the result saved in the previous checkpoint are compared to detect faults. We devised an operation algorithm in chectpoints to recover from transient faults as well as permanent faults. We also develop a Markov model for the optimization of the proposed checkpointing strategy. The probability of successful task execution within its deadline is derived from the Markov model. The optimal number of checkpoints is the checkpoints which makes the successful probability maximum.

A study on the comparision of AVTMR (All Voting Triple Modular Redundancy) and Dual-Duplex system (AVTMR 과 듀얼 듀플렉스 시스템 비교에 관한 연구)

  • 김현기;신석균;이기서
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.6A
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    • pp.1067-1077
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    • 2001
  • 본 논문에서는 결함의 영향을 받지 않고 동작할 수 있는 AVTMR(All Voting Triple Modular Redundancy) 시스템과 듀얼 듀플렉스(Dual-duplex) 시스템을 설계하고, 각 시스템의 평가를 통하여 RAMS(Reliability, Avaliability, Maintainability, Safety)를 비교하였다. ABTMR 시스템은 3중화된 보터(voter)를 사용하여 설계를 하였으며, 듀얼 듀플렉스 시스템은 비교기(comparator)를 이용하여 시스템을 설계하였다. 각 시스템은 버스 레벨로 데이터를 비교하도록 설계하였으며, 시스템 평가를 위해서 소자의 고장율은 MILSPEC-217F에 기반을 두고 RELEX6.0을 이용하였고, 마코브 모델(Markov model)을 이용하여 시스템의 RAMS를 평가하였다. 본 논문에서는 각 시스템을 MC68000을 기반으로 설계하여, 각각 시스템에 사용되는 비용 및 시스템이 어느 부분에서 선호될 수 있는가를 RAMS 및 MTTF(Mean Time To Failure)를 통하여 선택할 수 있는 기반을 제시하도록 나타내고 있다. 이러한 AVTMR이나 듀얼 듀플렉스 시스템(dual-duplex system)은 결함 허용 시스템(fault tolerant system)으로 인간의 생명과 직접적인 관련이 있는 고속철도 시스템이나 항공기 시스템에 적용될 수 있다.

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Dataline Redundancy Circuit Using Simple Shift Logic Circuit for Dual-Port 1T-SRAM Embedded in Display ICs (디스플레이 IC 내장형 Dual-Port 1T-SRAM를 위한 간단한 시프트 로직 회로를 이용한 데이터라인 리던던시 회로)

  • Kwon, O-Sam;Min, Kyeong-Sik
    • Journal of IKEEE
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    • v.11 no.4
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    • pp.129-136
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    • 2007
  • In this paper, a simple but effective Dataline Redundancy Circuit (DRC) is proposed for a dual-port 1T-SRAM embedded in Display ICs. The DRC designed in the dual-port $320{\times}120{\times}18$-bit 1T-SRAM is verified in a 0.18-um CMOS 1T-SRAM process. In the DRC, because its control logic circuit can be implemented by a simple Shift Logic Circuit (SLC) with only an inverter and a NAND that is much simpler than the conventional, it can be placed in a pitch as narrow as a bit line pair. Moreover, an improved version of the SLC is also proposed to reduce its worst-case delay from 12.3ns to 5.9ns by 52%. By doing so, the timing overhead of the DRC can be hidden under the row cycle time because switching of the datalines can be done between the times of the word line setup and the sense amplifier setup. The area overhead of the DRC is estimated about 7.6% in this paper.

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