• 제목/요약/키워드: Dual Redundancy

검색결과 46건 처리시간 0.031초

Redundancy of Dual and Steel Moment Frame Systems under Earthquakes

  • Song, S.H.;Wen, Y.K.
    • Computational Structural Engineering : An International Journal
    • /
    • 제1권2호
    • /
    • pp.137-137
    • /
    • 2001
  • The reliability/redundancy of structural system has become a serious concern among engineers and researchers after structural failures in Northridge and Kobe earthquakes. The reliability/redundancy factor, ρ, in current codes considers only member force and floor area and has received much criticism from dissatisfied engineers. Within a reliability framework. the redundancy is investigated for dual systems of primary shear walls and secondary moment frames and steel moment frame systems. Probabilistic performance analyses are carried out baled on nonlinear responses under SAC ground motion. The effects of structural configuration, ductilily capacity, 3-D motion, and uncertainty of demand verses capacity are investigated. Important redundancy-contributing factors are identified and a uniform-risk redundancy factor is developed for design. The result are compared with the p factor and its inconsistency is pointed out.

  • PDF

실시간 제어 시스템의 결함 극복을 위한 이중화 구조와 체크포인팅 기법의 성능 분석 (Performance Analysis of Checkpointing and Dual Modular Redundancy for Fault Tolerance of Real-Time Control System)

  • 유상문
    • 제어로봇시스템학회논문지
    • /
    • 제14권4호
    • /
    • pp.376-380
    • /
    • 2008
  • This paper deals with a performance analysis of real-time control systems, which engages DMR(dual modular redundancy) to detect transient errors and checkpointing technique to tolerate transient errors. Transient errors are caused by transient faults and the most significant type of errors in reliable computer systems. Transient faults are assumed to occur according to a Poisson process and to be detected by a dual modular redundant structure. In addition, an equidistant checkpointing strategy is considered. The probability of the successful task completion in a real-time control system where periodic checkpointing operations are performed during the execution of a real-time control task is derived. Numerical examples show how checkpoiniting scheme influences the probability of task completion. In addition, the result of the analysis is compared with the simulation result.

Experimental study on cyclic behavior of reinforced concrete parallel redundancy walls

  • Lua, Yiqiu;Huang, Liang
    • Structural Engineering and Mechanics
    • /
    • 제52권6호
    • /
    • pp.1177-1191
    • /
    • 2014
  • Reinforced concrete (RC) shear walls are one of the most commonly used lateral-load resisting systems in high-rise buildings. RC Parallel redundancy walls studied herein consist of two parts nested to each other. These two parts have different mechanical behaviors and energy dissipation mechanisms. In this paper, experimental studies of four 1/2-scale specimens representing this concept, which are subjected to in-plane cyclic loading, are presented and test results are discussed. Two specimens consist of a wall frame with barbell-shaped walls embedded in it, and the other two consist of a wall frame and braced walls nested each other. The research mainly focuses on the failure mechanism, strength, hysteresis loop, energy dissipation capacity and stiffness of these walls. Results show that the RC parallel redundancy wall is an efficient lateral load resisting component that acts as a "dual" system with good ductility and energy dissipation capacity. One main part absorbs a greater degree of the energy exerted by an earthquake and fails first, whereas the other part can still behave as an independent role in bearing loads after earthquakes.

듀얼 듀플렉스 시스템 설계 및 평가에 관한 연구 (A Study on the Design and Evaluation of Dual-Duplex System)

  • 김현기;신덕호;이기서
    • 대한전기학회논문지:시스템및제어부문D
    • /
    • 제50권4호
    • /
    • pp.168-176
    • /
    • 2001
  • In this paper, we develop a dual-duplex system which detects a fault by hardware comparator and switches to hot standby redundancy. This system is designed on the basis of MC68000 and can be used in VMEbus. To improve reliability, the dual-duplex system is designed in dual modular redundancy. The failure rate of electrical element is calculated in MILSPEC-217F, and the system RAMS(Reliability, Availiability, Maintainability and Safety) and MTTF(Mean Time to Failure) are evaluated by Markov modeling method. As the evaluation result shows improved reliability, it can be used as a component hardware for a highly reliable control system.

  • PDF

여유 자유도를 갖는 산업용 로봇의 역기구학 해석 및 최적 동작 계획 (Inverse Kinematics Solution and Optimal Motion Planning for Industrial Robots with Redundancy)

  • 이종화;김자영;이지홍;김동혁;임현규;류시현
    • 로봇학회논문지
    • /
    • 제7권1호
    • /
    • pp.35-44
    • /
    • 2012
  • This paper presents a method to optimize motion planning for industrial manipulators with redundancy. For optimal motion planning, first of all, particular inverse kinematic solution is needed to improve efficiency for manipulators with redundancy working in various environments. In this paper, we propose three kinds of methods for solving inverse kinematics problems; numerical and combined approach. Also, we introduce methods for optimal motion planning using potential function considering the order of priority. For efficient movement in industrial settings, this paper presents methods to plan motions by considering colliding obstacles, joint limits, and interference between whole arms. To confirm improved performance of robot applying the proposed algorithms, we use two kinds of robots with redundancy. One is a single arm robot with 7DOF and another is a dual arm robot with 15DOF which consists of left arm, right arm with each 7DOF, and a torso part with 1DOF. The proposed algorithms are verified through several numerical examples as well as by real implementation in robot controllers.

무인항공기 이중화 대기자료시스템 설계 및 통합 연구 (Design and Integration of a Dual Redundancy Air Data System for Unmanned Air Vehicles)

  • 원대연;윤성훈;이홍주;홍진성;황선유;임흥식;김태겸
    • 한국군사과학기술학회지
    • /
    • 제23권6호
    • /
    • pp.639-649
    • /
    • 2020
  • Air data systems measure airspeed, pressure altitude, angle of attack and angle of sideslip. These measurements are essential for operating flight control laws to ensure safe flights. Since the loss or corruption of air data measurements is considered as catastrophic, a high level of operational reliability needs to be achieved for air data systems. In the case of unmanned air vehicles, failure of any of air data sensors is more critical due to the absence of onboard pilot decision aid. This paper presents design of a dual redundancy air data system and the integration process for an unmanned air vehicle. The proposed dual-redundant architecture is based on two independent air data probes and redundancy management by central processing in two independent flight control computers. Starting from unit testing of single air data sensor, details are provided of system level tests used to meet overall requirements. Test results from system integration demonstrate the efficiency of the proposed process.

시스템의 신뢰도를 높이기 위한 교환제어모듈 설계 (DSCM (Dual Switching Control Module) Design to Heighten Reliability of System)

  • 정의국;장경배;심일주;박귀태
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 2004년도 하계학술대회 논문집 D
    • /
    • pp.2606-2609
    • /
    • 2004
  • As computer system has developed, the break down rate of system has been increased. So, engineers have been interested in reliability of system. General method that is used to heighten reliability of system is Redundancy of System by dual switching control. In this paper, we propose DSCM which can give Redundancy structure in existent PC(Microsoft Window 2000 OS) base system. And we experiment redundancy structure that is applied DSCM to currently using train control in IFC(Interface Computer) system.

  • PDF

중복구조 실시간 시스템에서의 고장 극복 및 최적 체크포인팅 기법 (Fault Recovery and Optimal Checkpointing Strategy for Dual Modular Redundancy Real-time Systems)

  • 곽성우
    • 대한전자공학회논문지TC
    • /
    • 제44권7호통권361호
    • /
    • pp.112-121
    • /
    • 2007
  • 본 논문에서는 중복 구조 시스템을 이용하여 각 프로세서에서의 출력을 비교하여 효율적으로 고장을 탐지하고, 체크포인팅 기법을 적용하여 과도 고장뿐 아니라 영구적 고장을 극복하기 위한 방법을 제안한다. 매 체크포인터에서는 각 프로세서로부터의 출력과 과거 체크포인터에 저장된 데이터를 불러와 서로 비교한 후 과거 체크포인터로 회귀할지 태스크의 수행을 계속 수행할지 결정한다. 과도 고장과 영구 고장이 발생할 수 있는 상황에서 제안된 체크포인팅 기법을 탑재한 중복 구조 시스템을 마코프 모델을 이용하여 모델링한다. 마코프 모델로부터 실시간 태스크가 데드라인 이내에서 성공적으로 수행을 끝낼 확률을 계산하고, 이 확률식을 이용하여 중복구조 시스템에 탑재할 체크포인터 구간을 최적화한다. 최적화된 체크포인터 구간은 태스크의 성공적 수행 확율을 최대화 하도록 선정하였다.

AVTMR 과 듀얼 듀플렉스 시스템 비교에 관한 연구 (A study on the comparision of AVTMR (All Voting Triple Modular Redundancy) and Dual-Duplex system)

  • 김현기;신석균;이기서
    • 한국통신학회논문지
    • /
    • 제26권6A호
    • /
    • pp.1067-1077
    • /
    • 2001
  • 본 논문에서는 결함의 영향을 받지 않고 동작할 수 있는 AVTMR(All Voting Triple Modular Redundancy) 시스템과 듀얼 듀플렉스(Dual-duplex) 시스템을 설계하고, 각 시스템의 평가를 통하여 RAMS(Reliability, Avaliability, Maintainability, Safety)를 비교하였다. ABTMR 시스템은 3중화된 보터(voter)를 사용하여 설계를 하였으며, 듀얼 듀플렉스 시스템은 비교기(comparator)를 이용하여 시스템을 설계하였다. 각 시스템은 버스 레벨로 데이터를 비교하도록 설계하였으며, 시스템 평가를 위해서 소자의 고장율은 MILSPEC-217F에 기반을 두고 RELEX6.0을 이용하였고, 마코브 모델(Markov model)을 이용하여 시스템의 RAMS를 평가하였다. 본 논문에서는 각 시스템을 MC68000을 기반으로 설계하여, 각각 시스템에 사용되는 비용 및 시스템이 어느 부분에서 선호될 수 있는가를 RAMS 및 MTTF(Mean Time To Failure)를 통하여 선택할 수 있는 기반을 제시하도록 나타내고 있다. 이러한 AVTMR이나 듀얼 듀플렉스 시스템(dual-duplex system)은 결함 허용 시스템(fault tolerant system)으로 인간의 생명과 직접적인 관련이 있는 고속철도 시스템이나 항공기 시스템에 적용될 수 있다.

  • PDF

디스플레이 IC 내장형 Dual-Port 1T-SRAM를 위한 간단한 시프트 로직 회로를 이용한 데이터라인 리던던시 회로 (Dataline Redundancy Circuit Using Simple Shift Logic Circuit for Dual-Port 1T-SRAM Embedded in Display ICs)

  • 권오삼;민경식
    • 전기전자학회논문지
    • /
    • 제11권4호
    • /
    • pp.129-136
    • /
    • 2007
  • 본 논문에서는 Dual-Port 구조를 사용하는 Display IC용 내장형 1T-SRAM에 적합한 간단하고 효과적인 새로운 데이터라인 리던던시 회로(dataline redundancy circuit)를 제안하고 이를 0.18-um CMOS 1T-SRAM 공정을 이용하여 $320{\times}120{\times}18$-Bit Dual-port 1T-SRAM로 구현하여 검증하였다. 한 개의 인버터와 한 개의 낸드 게이트로 이루어진 시프트 로직 회로(shift logic circuit)를 이용해서 기존의 데이터라인 리던던시 회로 보다는 훨씬 간단하게 컨트롤 로직을 구현함으로써 한 개의 비트라인 페어(bit line pair)의 피치(pitch) 내에서 필요한 컨트롤 로직을 모두 구현할 수 있었다. 또한 시프트 로직 회로를 개선해서 worst case에서의 delay를 12.3ns에서 5.9ns로 52% 감소시켜서 워드라인 셋업 후에서 센스앰프 셋업까지의 시간 동안에 데이터라인 스위칭 작업을 완료할 수 있게 하여서 데이터라인 리던던시 회로의 타이밍 오버헤드(timing overhead)를 row cycle 시간에 의해 감추어지게 할 수 있었다. 본 논문에서 제시된 데이터라인 리던던시 회로의 면적 오버헤드(area overhead)는 약 7.6%로 예측된다.

  • PDF