• Title/Summary/Keyword: Drivability

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Analysis of Abnormal Vibration by a Damper Clutch Operation in Low Speed Ranges of A/T Vehicles (A/T차량의 저속 영역에서 댐퍼클러치 작동에 따른 이상 진동 해석)

  • Shin, Changwoo;Kim, Beomsoo;Lee, Daeheung;Jeong, Jongryeol;Lim, Wonsik;Cha, Sukwon
    • Transactions of the Korean Society of Automotive Engineers
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    • v.21 no.3
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    • pp.157-164
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    • 2013
  • A damper clutch in automatic transmission systems has some advantages of fuel economy and dynamic performance. Although a damper clutch operation improves a fuel economy of the vehicles, a positive operation of a damper clutch in a low vehicle speed induces abnormal vibration. This paper analyzed one of reasons for abnormal vibration by a damper clutch operation in low engine speed ranges. A simulation model was designed to confirm the effects of a damper clutch operation under unstable regions of an engine. A theoretical analysis was carried out about an engine operation stability. Simulation was conducted to depict abnormal vibration by a damper clutch operation in unstable regions of an engine performance curve. The effects of an engine operation region for abnormal vibration by a damper clutch was investigated according to the range and the slope of unstable regions. As a result of simulations, a damper clutch operation would be better to avoid an engine unstable regions.

A Study on the Device Characteristics of NMOSFETs Having Elevated Source/drain Made by Selective Epitaxial Growth(SEG) of Silicon (실리콘 선택적 결정 성장 공정을 이용한 Elevated Source/drain물 갖는 NMOSFETs 소자의 특성 연구)

  • Kim, Yeong-Sin;Lee, Gi-Am;Park, Jeong-Ho
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.51 no.3
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    • pp.134-140
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    • 2002
  • Deep submicron NMOSFETs with elevated source/drain can be fabricated using self-aligned selective epitaxial growth(SEG) of silicon for enhanced device characteristics with shallow junction compared to conventional MOSFETs. Shallow junctions, especially with the heartily-doped S/D residing in the elevated layer, give hotter immunity to Yt roll off, drain-induced-barrier-lowering (DIBL), subthreshold swing (SS), punch-through, and hot carrier effects. In this paper, the characteristics of both deep submicron elevated source/drain NMOSFETs and conventional NMOSFETs were investigated by using TSUPREM-4 and MEDICI simulators, and then the results were compared. It was observed from the simulation results that deep submicron elevated S/D NMOSFETs having shallower junction depth resulted in reduced short channel effects, such as DIBL, SS, and hot carrier effects than conventional NMOSFETs. The saturation current, Idsat, of the elevated S/D NMOSFETs was higher than conventional NMOSFETs with identical device dimensions due to smaller sheet resistance in source/drain regions. However, the gate-to-drain capacitance increased in the elevated S/D MOSFETs compared with the conventional NMOSFETs because of increasing overlap area. Therefore, it is concluded that elevated S/D MOSFETs may result in better device characteristics including current drivability than conventional NMOSFETs, but there exists trade-off between device characteristics and fate-to-drain capacitance.

Design of Source Driver for QVGA-Scale LDI Using Mixed Driving Method (Mixed Driving 방식을 이용한 QVGA급 LDI의 Source Driver 설계)

  • Kim, Hak-Yun;Ko, Young-Keun;Lee, Sung-Woo;Choi, Ho-Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.11
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    • pp.40-47
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    • 2009
  • In this paper, we present the design of a source driver of QVGA scale TFT-LCD driver IC which uses a mixed driving method and performs $\gamma$-correction to improve image. The source driver with 240 RGB ${\times}$ 320 dots resolution drives a TFT-LCD panel through 720 channels and implements 262k colors using 18-bit RGB data format. The mixed driving method is a mixture the channel amp. driving method with high drivability and the gray amp. driving method with small area, which remarkably reduces channel driver areas. The driver has been designed using the $0.35{\mu}m$ Magnachip embedded DRAM technology and simulated using the HSPICE simulator. The results show that our source driver operates well with y-correction and the channel driver has $17{\mu}s$ channel driving time with only 78 driving amplifiers and control logic.

Development of Hardware-in-the-Loop Simulator for Testing Embedded System of Automatic Transmission (자동변속기용 임베디드 시스템 성능 시험을 위한 Hardware-in-the Loop 시뮬레이터 구축)

  • Jang, In-Gyu;Seo, In-Keun;Jeon, Jae-Wook;Hwang, Sung-Ho
    • Journal of Institute of Control, Robotics and Systems
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    • v.14 no.3
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    • pp.301-306
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    • 2008
  • Drivers are becoming more fatigued and uncomfortable with increase in traffic density, and this condition can lead to slower reaction time. Consequently, they may face the danger of traffic accidents due to their inability to cope with frequent gear shifting. To reduce this risk, some drivers prefer automatic transmission (AT) over manual transmission (MT). The AT offers more superior drivability and less shifting shock than the MT; therefore, the AT market share has been increasing. The AT is controlled by an electronic control unit (ECU), which provides better shifting performance. The transmission control unit (TCU) is a higher-value-added product, so the companies that have advanced technologies end to evade technology transfer. With more cars gradually using the ECU, the TCU is expected to be faster and more efficient for organic communication and arithmetic processing between the control systems than the l6-bit controller. In this paper, the model of an automatic transmission vehicle using MATLAB/Simulink is developed for the Hardware in-the-Loop (HIL) simulation with a 32-bit embedded system, and also the AT control logic for shifting is developed by using MATLAB/Simulink. The developed AT control logic, transformed automatically by real time workshop toolbox, is loaded to a 32-bit embedded system platform based on Freescale's MPC565. With both vehicle model and 32-bit embedded system platform, we make the HIL simulation system and HIL simulation of AT based on real time operating system (RTOS) is performed. According to the simulation results, the developed HIL simulator will be used for the performance test of embedded system for AT with low cost and effort.

Dickson Charge Pump with Gate Drive Enhancement and Area Saving

  • Lin, Hesheng;Chan, Wing Chun;Lee, Wai Kwong;Chen, Zhirong;Zhang, Min
    • Journal of Power Electronics
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    • v.16 no.3
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    • pp.1209-1217
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    • 2016
  • This paper presents a novel charge pump scheme that combines the advantages of Fibonacci and Dickson charge pumps to obtain 30 V voltage for display driver integrated circuit application. This design only requires four external capacitors, which is suitable for a small-package application, such as smart card displays. High-amplitude (<6.6 V) clocks are produced to enhance the gate drive of a Dickson charge pump and improve the system's current drivability by using a voltage-doubler charge pump with a pulse skip regulator. This regulation engages many middle-voltage devices, and approximately 30% of chip size is saved. Further optimization of flying capacitors tends to decrease the total chip size by 2.1%. A precise and simple model for a one-stage Fibonacci charge pump with current load is also proposed for further efficiency optimization. In a practical design, its voltage error is within 0.12% for 1 mA of current load, and it maintains a 2.83% error even for 10 mA of current load. This charge pump is fabricated through a 0.11 μm 1.5 V/6 V/32 V process, and two regulators, namely, a pulse skip one and a linear one, are operated to maintain the output of the charge pump at 30 V. The performances of the two regulators in terms of ripple, efficiency, line regulation, and load regulation are investigated.

A Study on the Weight Optimization for the Passenger Car Seat Frame Part (상용승용차 시트프레임 부품의 중량 최적화에 관한 연구)

  • Jang, In-Sik;Min, Byeong-Jo
    • Transactions of the Korean Society of Automotive Engineers
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    • v.14 no.5
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    • pp.155-163
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    • 2006
  • Car seat is one the most important element to make comfortable drivability. It can absorb the impact or vibration during driving state. In addition to those factors, it is needed to have enough strength for passenger safety. From energy efficiency and environmental point of view lighter passenger car seat frame becomes hot issue in the auto industry. In this paper, weight optimization methodology is investigated for commercial car seat frame using CAE. Optimized designs for seat frame are developed using commercially available finite element code(ANSYS) and design of experiment method. At first, car seat frame is modelled using 3-D computer aided design tool(CATIA) and simplified for finite element modelling. Finite element analysis is carried out for the case of FMVSS 202 Head Restraint test to check the strength of the original seat frame. Two base brackets are selected as optimized elements that are the heaviest parts in the seat frame. After finite element analysis for the brackets with similar load condition to the previous test optimization technique is applied for 10% to 50% weight reduction. Design of experiment is utilized to obtain optimization design for the bracket based on the modified 50% weight reduction model in which outer shape of the bracket is conserved. Weight optimization models result in the decrease of the strength in spite of weight reduction. The more design points should be considered to get better optimized model. The more advanced optimization technique may be utilized for more parts of the seat frame to increase whole seat frame characteristics in the future.

Safety Evaluation of the Settlement Amount of the Bridge Earthwork Transition Area Using the Ground Penetrating Radar in the Soft Ground Section (연약지반 구간에서 지표투과레이더 활용한 교량 접속부 침하량 안전 평가)

  • Jung, Gukyoung;Jo, Youngkyun;Kim, Sungrae
    • Journal of the Korean GEO-environmental Society
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    • v.23 no.8
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    • pp.17-22
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    • 2022
  • To reduce the bump of bridge/earthwork transition area caused by the settlement of the soft ground during public use, the road agencies have been continuously overlay or repavement at those areas. In this study, the vehicle-mounted ground penetrating radar with 1GHz air-coupled antenna was used to estimate the settlement amount of those areas for nine bridges built in the soft ground. Results shows that it is possible to effectively measure the thickness of pavement up to a depth of 1 m on an asphalt road with ground penetrating radar technology that can inspect under the road surface. Distinctively deformation of the road surface, the variation in the thickness of the pavement measured at bridge/earth transition areas is equivalent to a minimum of 50 mm and a maximum of 600 mm, and there is a risk of cavity in the ground. The difference in the increased pavement thickness is 50~250 mm for each bridge connection, which may cause the differential settlement. In this study, by using the result of the ground penetration radar, a plan for improving drivability and maintenance of the settlement is suggested and applied to the field.

Evaluation on Damage Effect according Displacement Behavior of Underground Box Structure (지하박스구조물의 변위거동에 따른 손상영향 평가)

  • Jung-Youl Choi;Dae-Hui Ahn;Jae-Min Han
    • The Journal of the Convergence on Culture Technology
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    • v.10 no.1
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    • pp.565-570
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    • 2024
  • Recently, due to adjacent excavation work such as new buildings and common tunnel expansion concentrated around the urban railway, deformation of the underground box and tunnel structure of the urban railway built underground has occurred, and as a result, repair and reinforcement work is frequently carried. In addition, the subway is responsible for large-scale transportation, so ensuring the safety and drivability of underground structures is very important. Accordingly, an automated measurement system is being introduced to manage the safety of underground box structures. However, there is no analysis of structural damage vulnerabilities caused by subsidence or uplift of underground box structures. In this study, we aim to analyze damage vulnerabilities for safety monitoring of underground box structures. In addition, we intend to analyze major core monitoring locations by modeling underground box structures through numerical analysis. Therefore, we would like to suggest sensor installation locations and damage vulnerable areas for safety monitoring of underground box structures in the future.

Circuit Modeling and Simulation of Active Controlled Field Emitter Array for Display Application (디스플레이 응용을 위한 능동 제어형 전계 에미터 어레이의 회로 모델링 및 시뮬레이션)

  • Lee, Yun-Gyeong;Song, Yun-Ho;Yu, Hyeong-Jun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.2
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    • pp.114-121
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    • 2001
  • A circuit model for active-controlled field emitter array(ACFEA) as an electron source of active-controlled field emission display(ACFED) has been proposed. The ACFEA with hydrogenated amorphous silicon thin-film transistor(a-Si:H TFT) and Spindt-type molibdenum tips (Spindt-Mo FEA) has been fabricated monolithically on the same glass. A-Si:H TFT is used as a control device of field emitters, resulting in stabilizing emission current and lowering driving voltage. The basic model parameters extracted from the electrical characteristics of the fabricated a-Si:H TFT and Spindt-Mo FEA were implemented into the ACFEA model with a circuit simulator SPICE. The accuracy of the equivalent circuit model was verified by comparing the simulated results with the measured one through DC analysis of the ACFEA. The transient analysis of the ACFEA showed that the gate capacitance of FEA along with the drivability of TFT strongly affected the response time. With the fabricated ACFEA, we obtained a response time of 15$mutextrm{s}$, which was enough to make 4bit/color gray scale with the pulse width modulation (PWM).

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Design Efficiency Improvement Method Research for High Strength Steel Pipe Pile at Gwangyang Area (광양지역 고강도 강관 항타말뚝의 설계효율 향상 방안 연구)

  • La, SeungMin;Yoo, Hankyu
    • KSCE Journal of Civil and Environmental Engineering Research
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    • v.31 no.6C
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    • pp.231-240
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    • 2011
  • Various pile load tests were carried out at Gwangyang district for 10 different piles in order to analyze the characteristcs of steel pile using high strength steel and high driving energy. Pile drivability results showed that PHC piles needed highest total blow count even with the shortest pile length and high strength steel pipe piles showed smallest total blow count eventhough driven to a more hard ground condition with longer pile length. Pile dynamic analysis results showed that for PHC pile and general steel pipe pile the allowable pile design load was decided by the allowable material strength but for high strength steel pipe pile the design load can be decided according to the ground bearing capacity. Static load test and load transfer test results showed that the pile design efficiency could be improved over 80% allowing lesser number of piles necessary for a more economical solution. Set-up effects was analyzed and regression equation for the site ground condition was derived. Bearing capacity was checked with widely used design equation and the limitation of current design method and future technology development on this subject is dicussed in this paper.