• 제목/요약/키워드: Drift compensation

검색결과 77건 처리시간 0.027초

초정밀 마이크로 위치결정 스테이지의 제작 및 평가 (Experiment of the Precision micro-positioning stage)

  • 한창수;백석;노명규;이찬홍
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2002년도 춘계학술대회 논문집
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    • pp.244-247
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    • 2002
  • The performance of the precision micro-positioning 4-dof stage is presented. The compact design utilizes the monolithic mechanism to achieve the translation in the Z axis and rotation in the $\theta$ z, $\theta$ x and $\theta$ y axes with high stiffness and high damping. Hysteresis, nonlinearity, and drift of the piezoelectric effects are improved by incorporating the sensors in a feedback control. Experiments demonstrate that the micro-positioning stage is capable of 2nm resolution over the travel range of 25$\mu\textrm$ m in the Z axis, 0.0l7 $\mu\textrm$ rad resolution over the 170$\mu\textrm$ rad in the $\theta$ z and 0.011 $\mu\textrm$ rad resolution over the $\mu\textrm$ rad in the $\theta$ x and $\theta$ y axes. The cross-axis interferences among the axes are at a noise range. This stage is available for positioning error compensation of the XY stage with large stroke.

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주파수 변동시 불평형 전압에 강인한 DSC-PLL 설계 연구 (The Design of Robust DSC-PLL under Distorted Grid Voltage Contained Unbalance on Frequency Variation)

  • 이재도;차한주
    • 전기학회논문지
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    • 제67권11호
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    • pp.1447-1454
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    • 2018
  • In this paper, the design of robust DSC-PLL(Delayed Signal Cancellation Phase Locked Loop) is proposed for coping with frequency variation. This method shows significant performance for detection of fundamental positive sequence component voltage when the grid voltage is polluted by grid unbalance and frequency variation. The feedback frequency estimation of DSC-PLL is tracking the drift in the phase by unbalance and frequency variation. The robust DSC PLL is to present the analysis on method and performance under frequency variations. These compensation algorithms can correct for discrepancies of changing the frequency within maximum 193[ms] and improve traditional DSC-PLL. Linear interpolation method is adopted to reduce the discretized errors in the digital implementation of the PLL. For verification of robust characteristic, PLL methods are implemented on FPGA with a discrete fixed point based. The proposed method is validated by both Matlab/Simulink and experimental results based on FPGA(XC7Z030).

A Novel Position Sensorless Speed Control Scheme for Permanent Magnet Synchronous Motor Drives

  • Won, Tae-Hyun;Lee, Man-Hyung
    • KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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    • 제2B권3호
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    • pp.125-132
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    • 2002
  • PMSMS (permanent magnet synchronous motors) are widely used in industrial applications and home appliances because of their high torque to inertia ratio, superior power density, and high efficiency. For high performance control, accurate informations about the rotor position is essential. Sensorless algorithms have lately been studied extensively due to the high cost of position sensors and their low reliability in harsh environments. A novel position sensorless speed control for PMSMs uses indirect flux estimation and is presented in this paper. Rotor position and angular velocity are estimated by the proposed indirect flux estimation. Linkage flux and magnetic field flux are calculated by the voltage equations and the measured phase current without any integration. Instead of linkage flux calculation with integral operation, indirect flux and differential magnetic field are used for the estimation of rotor position. A proper rejection technique fur current noise effect in the calculation of differential linkage flux is introduced. The proposed indirect flux detecting method is free from the integral rounding error and linkage flux drift problem, because differential linkage flux can be calculated without any integral operation. Furthermore, electrical parameters of the PMSM can be measured by the proposed TCM (time compression method) for soft starting and precise estimation of rotor position. The position estimator uses accurate electrical parameters that are obtained from the proposed TCM at starting strategy. In the operating region, a proper compensation method fur temperature effect can compensate fir the estimation error from the variation of electrical parameters. The proposed novel position sensorless speed control scheme is verified by the experimental results.

상용 Single Chip Solution을 이용한 정전용량형 변위 센서 신호 처리 모듈 개발 (Development of a Signal Conditioning Circuit for Capacitive Displacement Sensors Using a Commercial Single Chip Solution)

  • 김종안;김재완;엄태봉
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2006년도 춘계학술대회 논문집
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    • pp.31-32
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    • 2006
  • A signal conditioning circuit for capacitive sensors was developed using a commercial single chip solution. Since capacitive displacement sensors can achieve high resolution and linearity, they have been widely used as precision sensors within the range of several hundred micrometers. However, they inherently have a limitation in low frequency range and some nonlinearity characteristics and so a specially designed signal conditioning circuit is needed to handle these properties. Up to now, several companies already have succeeded in the development of the capacitive sensors system and they are commercially available in the market. In this research, to construct the signal processing circuits more easily and simply, we used a universal LVDT signal conditioner (AD698). Since the AD698 provides one chip solution for a basic signal processing including modulation and demodulation using various internal components, we can build the processing circuits successfully with minimal additional circuits: a compensation circuits for the drift caused by the bias current of OP amplifiers and a fine adjustment circuit for the elimination of nonlinearity. The signal processing circuits shows nonlinearity less than 0.05% in the comparison with a laser interferometer.

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Bi-directional Two Terminal Switching Device based on SiGe for Spin Transfer Torque (STT) MRAM

  • Yang, Hyung-Jun;Kil, Gyu-Hyun;Lee, Sung-Hyun;Song, Yun-Heub
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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    • pp.385-385
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    • 2012
  • A two terminal N+/P/N+ junction device to replace the conventional selective transistor was studied as a bilateral switching device for spin transfer torque (STT) MRAM based on 3D device simulation. An N+/P/N+ junction structure with $30{\times}30nm$ area requires bi-directional current flow enough to write a data by a drain induced barrier lowering (DIBL) under a reverse bias at N+/P (or P/N+ junction), and high current on/off ratio of 106. The SiGe materials are widely used in hetero-junction bipolar transistors, bipolar compensation metal-oxide semiconductors (BiCMOS) since the band gap of SiGe materials can be controlled by changing the fraction and the strain epilayers, and the drift mobility is increased with the increasing Ge content. In this work, N+/P/N+ SiGe material based junction provides that drive current is increased from 40 to $130{\mu}A$ by increased Ge content from 10~80%. When Ge content is about 20%, the drive current density of SiGe device substantially increased to 2~3 times better than Si-based junction device in case of 28 nm P length, which is sufficient current to operation of STT-MRAM.

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분산 제어 시스템을 위한 EtherCAT 시계 동기화의 성능 평가 (Evaluation of EtherCAT Clock Synchronization in Distributed Control Systems)

  • 김웅기;성민영
    • 대한기계학회논문집A
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    • 제38권7호
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    • pp.785-797
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    • 2014
  • EtherCAT의 시계 동기화 기법인 DC(Distributed Clock)는 실시간 분산 제어 시스템에서 고도로 동기화된 기능의 설계를 가능하게 한다. 본 논문은 실제 자동화 시스템에서의 광범위한 실험을 통해 EtherCAT DC 기법의 성능을 평가한다. Xenomai와 IgH EtherCAT 스택을 이용하여 EtherCAT 제어 시스템을 구축하고, 네트워크 내의 노드 간 시계 편차를 분석한다. 실험 결과, 동기 시계의 정확도는 슬레이브 장치의 개수, 드리프트 보정의 주기, 시스템 기준 시계의 종류 등 많은 요소에 의해 영향을 받음을 알 수 있었다. 특히, 시스템 기준 시계의 종류에 따라 마스터 장치의 동작이 근본적으로 상이하며 매우 다른 성능 특성을 초래하므로, 기준 시계의 선택은 신중히 이루어져야 함을 알 수 있었다.

LQR 제어이득의 효율적 산정에 의한 능동텐던 구조물의 최적화 (Optimization of Active Tendon Controlled Structures by Efficient Solution of LQR Control Gain)

  • 조창근;권준명;정인규;박문호
    • 한국공간구조학회논문집
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    • 제8권4호
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    • pp.73-80
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    • 2008
  • 본 논문의 목적은, LQR 제어이득의 효율적 산정에 의한 지진하중을 받는 빌딩 구조물의 능동지진제어를 위하여 능동텐던 장치를 적용한 구조물의 지진응답제어를 위한 최적화 방법을 제시한 것이다. 텐던을 이용한 구조물 지진응답제어 문제의 정식화를 위해 Ricatti 폐회로 제어이론 및 위상보정에 의한 시간지연현상을 도입하였으며, 상태방정식의 해를 산정하기 위해 전달 행렬을 이용한 수치해석법을 이용 사다리꼴적분법에 의해 상태벡터의 해를 산정하였다. 성능지수의 최적화를 위해, 최소 가중행렬비를 설계변수로, IBC 2000의 허용층간변위 규정과 텐던의 최대제어력을 제약조건으로 하여, SUMT 기법에 의해 최적 해를 산정토록 최적제어 프로그램을 개발하였다. 8층 빌딩구조물에 대한 적용 예에서, 최적제어를 적용한 시스템이 비제어 시스템에 비해 층간제어효과가 우수하고, 일정 가중행렬비 적용 제어시스템에 비해 낮은 성능지수가 요구되었다.

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