• Title/Summary/Keyword: Down converter

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Research on Digital Complex-Correlator of Synthetic Aperture Radiometer: theory and simulation result

  • Jingye, Yan;Ji, Wu;Yunhua, Zhang;Jiang, Changhong;Tao, Wang;Jianhua, Ren;Jingshan, Jiang
    • Proceedings of the KSRS Conference
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    • 2002.10a
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    • pp.587-592
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    • 2002
  • A new digital correlator fur an airborne synthetic aperture radiometer was designed in order to replace the conventional analog correlator unit which will become very complicated while the number of channels is increasing. The digital correlator uses digital IQ demodulator instead of the intermediate frequency (IF) phase shifter to make the correlation processing performed digitally at base band instead of analogly at IF. This technique has been applied to the digital receiver in softradio. The down-converted IF signals from each pair of receiver channels become low rate base-band digital signals after under-sampled, Digitally Down-Converted (DDC), decimated and filtered by FIR filters. The digital signals are further processed by two digital multipliers (complex correlation), the products are integrated by the integrators and finally the outputs from the integrators compose of the real part and the imaginary part of a sample of the visibility function. This design is tested by comparing the results from digital correlators and that from analog correlators. They are agreed with each other very well. Due to the fact that the digital correlators are realized with the help of Analog-Digital Converter (ADC) chips and the FPGA technology, the realized volume, mass, power consumption and complexity turned out to be greatly reduced compared with that of the analog correlators. Simulations show that the resolution of ADC has an influence on the synthesized antenna patterns, but this can be neglected if more than 2bit is used.

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Step-Down Characteristics of Multi-layed Piezo Transformer for Transverse Vibration Mode (경방향 진동모드를 이용한 적층형 압전변압기의 강압특성)

  • Chong, Hyon-Ho;Park, Tae-Gone;Kim, Myong-Ho
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.11a
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    • pp.340-343
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    • 2003
  • This paper presents characteristics of piezo transformer for AC-DC converter. This transformer uses transverse vibration mode and the origin of the structure was the ring dot type transformer. Because, the ring dot type transformers produce only step-up phenomenon, we made a multi-layered ring dot structure for a step-down output. The characteristics of the transformer were simulated by using the ANSYS. And frequency and voltage were measured by changing the load resistance and current. Frequencies that have the maximum output voltage and current were gradually increased, when the resistance were increased. Output voltage and current show a stable linearity according to the input voltage. The maximum output power was expected greater than 20 [W]. So, we expect that this type of multi-layered step-down ring dot transformer can be adopted for a small AC adapters.

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Three Phase Embedded Z-Source Inverter (3상 임베디드 Z-소스 인버터)

  • Oh, Seung-Yeol;Kim, Se-Jin;Jung, Young-Gook;Lim, Young-Cheol
    • The Transactions of the Korean Institute of Power Electronics
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    • v.17 no.6
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    • pp.486-494
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    • 2012
  • In this paper, we proposes the three-phase embedded Z-source inverter consisting of the three embedded Z-source converters and it's the output voltage control method. Each embedded Z-source converter can produce the bipolar output capacitor voltages according to duty ratio D such as single-phase PWM inverter. The output AC voltage of the proposed system is obtained as the difference in the output capacitor voltages of each converter, and the L-C output filter is not required. Because the output AC voltage can be stepped up and down, the boost DC converter in the conventional two-stage inverter is unnecessary. To confirm the validity of the proposed system, PSIM simulation and a DSP based experiment were performed under the condition of the input DC voltage 38V, load $100{\Omega}$, and switching frequency 30kHz. Each converter is connected by Y-connection for three-phase loads. In case that the output phase voltage is the same $38V_{peak}$ as the input DC voltage and is the 1.5 times($57V_{peak}$), the simulation and experimental results ; capacitor voltages, output phase voltages, output line voltages, inductor currents, and switch voltages were verified and discussed.

A Threshold-voltage Sensing Circuit using Single-ended SAR ADC for AMOLED Pixel (단일 입력 SAR ADC를 이용한 AMOLED 픽셀 문턱 전압 감지 회로)

  • Son, Jisu;Jang, Young-Chan
    • Journal of IKEEE
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    • v.24 no.3
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    • pp.719-726
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    • 2020
  • A threshold-voltage sensing circuit is proposed to compensate for pixel aging in active matrix organic light-emitting diodes. The proposed threshold-voltage sensing circuit consists of sample-hold (S/H) circuits and a single-ended successive approximation register (SAR) analog-to-digital converter (ADC) with a resolution of 10 bits. To remove a scale down converter of each S/H circuit and a voltage gain amplifier with a signl-to-differentail converter, the middle reference voltage calibration and input range calibration for the single-ended SAR ADC are performed in the capacitor digital-to-analog converter and reference driver. The proposed threshold-voltage sensing circuit is designed by using a 180-nm CMOS process with a supply voltage of 1.8 V. The ENOB and power consimption of the single-ended SAR ADC are 9.425 bit and 2.83 mW, respectively.

Design of the DC-DC Buck Converter for Mobile Application Using PWM/PFM Mode (PWM/PFM 모드를 이용한 모바일용 벅 변환기 설계)

  • Park, Li-Min;Jung, Hak-Jin;Yoo, Tai-Kyung;Yoon, Kwang-Sub
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.11B
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    • pp.1667-1675
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    • 2010
  • This paper presents a high efficiency DC-DC buck converter for mobile device. The circuit employes simplified compensation circuit for its portability and for high efficiency at stand-by mode. This device operates at PFM mode when it enters stand-by mode(light load). In order to place the compensation circuit on chip, the capacitor multiplier method is employed, such that it can minimize the compensation block size of the error amplifier down to 30%. The measurement results show that the buck converter provides a peak efficiency of 93% on PWM mode, and 92.3% on PFM mode. The converter has been fabricated with a $0.35{\mu}m$ CMOS technology. The input voltage of the buck converter ranges from 2.5V to 3.3V and it generates the output of 3.3V.

High Ratio Bidirectional DC-DC Converter with a Synchronous Rectification H-Bridge for Hybrid Energy Sources Electric Vehicles

  • Zhang, Yun;Gao, Yongping;Li, Jing;Sumner, Mark;Wang, Ping;Zhou, Lei
    • Journal of Power Electronics
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    • v.16 no.6
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    • pp.2035-2044
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    • 2016
  • In order to match the voltages between high voltage battery stacks and low voltage super-capacitors with a high conversion efficiency in hybrid energy sources electric vehicles (HESEVs), a high ratio bidirectional DC-DC converter with a synchronous rectification H-Bridge is proposed in this paper. The principles of high ratio step-down and step-up operations are analyzed. In terms of the bidirectional characteristic of the H-Bridge, the bidirectional synchronous rectification (SR) operation is presented without any extra hardware. Then the SR power switches can achieve zero voltage switching (ZVS) turn-on and turn-off during dead time, and the power conversion efficiency is improved compared to that of the diode rectification (DR) operation, as well as the utilization of power switches. Experimental results show that the proposed converter can operate bidirectionally in the wide ratio range of 3~10, when the low voltage continuously varies between 15V and 50V. The maximum efficiencies are 94.1% in the Buck mode, and 93.6% in the Boost mode. In addition, the corresponding largest efficiency variations between SR and DR operations are 4.8% and 3.4%. This converter is suitable for use as a power interface between the battery stacks and super-capacitors in HESEVs.

A Simulation Investigation on the Spurious Emission Reduction of the Automotive DC-DC Converter (자동차용 DC-DC 컨버터의 전자파 방사 감소 방법에 대한 시뮬레이션 연구)

  • Chae, Gyoo-Soo
    • Journal of Convergence for Information Technology
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    • v.10 no.8
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    • pp.47-52
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    • 2020
  • In this study, a simulation investigation was conducted on the method of reducing switching noise and spurious emission among design methods for step-down DC-DC converter modules for automotive. A typical 4-layer converter circuit using a PMIC(Power Management Integrated Circuit) chip was presented, and the simulation results of conductive emissions at two input terminals (+, -) and the point between the input filter and the PMIC was performed in the 1.0~5.0MHz band and the 100MHz band. The results for the conducted and radiated emissions in the HF(3~30MHz) and VHF(30-300MHz) bands were presented. It showed an improvement of about 10dB over the bands by routing the output terminal placed on the 3 or 4-layer in the opposite direction to the input terminal. The result of this study is expected to be useful in the design of the DC-DC converter modules in the future because it gives a better improvement compared to the existing methods.

Development of Hardware Simulator for DFIG Wind Power System Composed of Anemometer and Motor-Generator Set (풍속계와 Motor-Generator 세트를 이용한 DFIG 풍력발전시스템 하드웨어 시뮬레이터 개발)

  • Oh, Seung-Jin;Cha, Min-Young;Kim, Jong-Won;Jeong, Jong-Kyou;Han, Byung-Moon;Chang, Byung-Hoon
    • The Transactions of the Korean Institute of Power Electronics
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    • v.16 no.1
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    • pp.11-19
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    • 2011
  • This paper describe development of a hardware simulator for the DFIG wind power system, which was designed considering wind characteristic, blade characteristic, and blade inertia compensation. The simulator consists of three major parts, such as wind turbine model using induction motor, doubly-fed induction generator, converter-inverter set. and control system. The turbine simulator generates torque and speed signals for a specific wind turbine with respect to the given wind speed which is detected by Anemometer. This torque and speed signals are scaled down to fit the input of 3.5kW DFIG. The MSC operates to track the maximum power point, and the GSC controls the active and reactive power supplied to the grid. The operational feasibility was verified through computer simulations with PSCAD/EMTDC. And the implementation feasibility was confirmed through experimental works with a hardware set-up.

Spot-size converter design of an $1.3\mu{m}$ SSC-FP-LD for optical subscriber network (광가입자용 $1.3\mu{m}$ SSC-FP-LD의 모드변환기 구조 설계)

  • 심종인;진재현;어영선
    • Korean Journal of Optics and Photonics
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    • v.11 no.6
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    • pp.411-417
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    • 2000
  • The waveguide structure effects of a spot-size converter (SSe) of a $1.3\mu{m}$ FP(Fabry-Perot)-LD(Laser Diode) were investigated. Its coupling efficiency and alignment tolerance with a single-mode fiber (SMF) were carefully examined by using a 3dimensional BPM (Beam Propagation Method). It was shown that the fOlmation of enough length of straightened waveguide around the end of the sse region can substantially improve the optical coupling efficiency for a vertically tapered sse. In contrast, a down-taper structure for a laterally tapered sse has superior characteristics to an up-tapered one. We suggested good sse structures which can provide a high coupling efficiency as well as a large alignment tolerance with an .SMF. .SMF.

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Microprocessor Based Permanent Magnet Synchronous Motor Drive (마이크로 프로세서에 의한 영구자석동기 전동기의 구동)

  • Yoon, Byung-Do
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.35 no.12
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    • pp.541-554
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    • 1986
  • This paper presents the results of driving performance analysis of permanent magnet synchronous motor using a microprocessor based control system. The system consists of three phase power transistor inverters, three phase controlled rectifier, three central processing units, and sensors. The three CPUs are, respectively, used to generate PWM control signals for the inverter generating three phase sine wave, to generate the gate control signals for firing the converter, and to supervise other two CPUs. The supervisor is used to compute PI control algtorithm to three phase reference sine wave for the inverter. It is also used to maintain a constant voltage frequency ratio for the converter operating as a constant torque controller. The inverter CPU retrieves precomputed PWM patterns from look up tables because of computation speed limitations found in almost available microprocessors. The converter CPU also retrieves precomputed gate control patterns from another look-up tables. For protecting the control ststem from any damage by extraordinary over currents, the supervisor receives the data from current sensor, CT, and break down the CB to isolate the circuits from source. A resolver has a good performance characteristics of overall speed range, especially on low speed range. Therefor the speed control accuracy is impoved. The microprocessor based PM synchronous motor control system, thus, has many advantages such as constant torque characteristics, improvement of wave, limitation on extraordinary over currents, improvement of speed control accuracy, and fast response speed control using multi-CPU and look-up tables.

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