• The Transactions of the Korean Institute of Power Electronics
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• v.21 no.5
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• pp.381-387
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• 2016

Many efforts have focused on the improvement of power density and efficiency by downsizing the motor and inverter. Recently, Toyota, Honda, and GM realized that the compact-sized motor uses the hairpin structure with increased space factor. Reducing the maximum torque from high-speed technique also makes it possible to design the high-power density model. Toyota and Honda used the newly developed power semiconductor IGBT to decrease conduction loss for high-efficiency inverter. In particular, Toyota used the boost converter to increase the DC link voltage for high efficiency in low-torque high-speed region. Toyota and GM also used the double-sided cooling structure for miniaturization of inverter for high-power density.

• Transactions of the Korean Society of Machine Tool Engineers
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• v.17 no.3
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• pp.14-19
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• 2008

In the semiconductor IC(Integrated Circuit) package, the top surface of silicon chip is directly attached to the area of the leadframe with a double-sided adhesive layer, in which the base layer have the upper adhesive layer and the lower adhesive layer. The IC package structure has been known to encounter a thermo-mechanical failure mode such as delamination. This failure mode is due to the residual stress on the adhesive surface of silicon chip and leadframe in the curing-cooling process. The induced thermal stress in the curing process has an influence on the cooling residual stress on the silicon chip and leadframe. In this paper, for the minimization of the chip surface damage, the adhesive topologies on the silicon chip are studied through the finite element analysis(FEA).