• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 추계학술대회 논문집 Vol.15
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• pp.300-304
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• 2002

We fabricated thick film monopole antennas using Mo-doped $BiNbO_{4}$ ceramics and investigated their electrical properties as a function of the Mo-doping concentration. Compared with undoped $BiNbO_{4}$ ceramics, 10 at.% Mo-doping improved microwave dielectric properties of ceramics by increased sintered density as well as decreased space charge density. Further increase in the Mo-doping concentration caused formation of $Bi_{2}MoO_{6}$ phases, resulting in deterioration of the microwave characteristics. The gain and bandwidth of the ceramic monopole antenna were also greatly affected by the Mo-doping concentration. When Mo-doping concentration was 10 at%, highest gain of ~0.7dBi with lowest bandwidth of 30% at 2.3GHz was obtained.

• 한국전기전자재료학회논문지
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• 제29권4호
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• pp.199-204
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• 2016

This paper was proposed floating island power MOSFET for lowering on state resistance and the proposed device was maintained 600 V breakdown voltage. The electrical field distribution of floating island power MOSFET was dispersed to floating island between P-base and N-drift. Therefore, we designed higher doping concentration of drift region than doping concentration of planar type power MOSFET. And so we obtain the lower on resistance than on resistance of planar type power MOSFET. We needed the higher doping concentration of floating island than doping concentration of drift region and needed width and depth of floating island for formation of floating island region. We obtained the optimal parameters. The depth of floating island was $32{\mu}m$. The doping concentration of floating island was $5{\times}1,012cm^2$. And the width of floating island was $3{\mu}m$. As a result of designing the floating island power MOSFET, we obtained 723 V breakdown voltage and $0.108{\Omega}cm^2$ on resistance. When we compared to planar power MOSFET, the on resistance was lowered 24.5% than its of planar power MOSFET. The proposed device will be used to electrical vehicle and renewable industry.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.133-133
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• 2010

We studied the thermal and electric effect of 2D and 3D p-n photovoltaic diode structures with and without surface texturing. By analyzing the numerical simulation results of I-V characteristics and lattice temperature distributions, we systematically studied the effect of different texturing structures and different doping concentration on the characteristics of the silicon p-n photovoltaic devices. The, efficiency of the device with the surface texturing shows more than ~ 2% enhancement compared to the reference devices without texturing. The tendency of the efficiency of doping concentration has been studied with boron doping of $10^{14}{\sim}10^{17}cm^{-3}$ and phosphorus doping of $10^{15}cm^{-3}$. In addition to that, the study of changing phosphorus doping of $10^{15}{\sim}10^{18}cm^{-3}$ with boron doping of $10^{14}cm^{-3}$ has been examined. It has been shown that the texturing structure not only improves the light trapping but also plays an important role in the heat radiation.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1992년도 하계학술대회 논문집 B
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• pp.820-824
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• 1992

An accurate method for extracting both Si film doping concentration and front or back silicon-to-oxide fixed charge density of fully depleted SOI devices is proposed. The method utilizes the current-to-voltage and capacitance-to-voltage characteristics of both SOI NMOSFET and PMOSFET which have the same doping concentration. The Si film doping concentration and the front or back silicon-to-oxide fixed charge density are extracted by mainpulating the respective threshold voltages of the SOI NMOSFET and PMOSFET according to the back surface condition (accumulation or inversion) and the capacitance-to-voltage characteristics of the SOI PMOSFET. Device simulations show that the proposed method has less than 10% errors for wide variations of the film doping concentration and the front or the back silicon-to-oxide fixed charge density.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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• pp.437-438
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• 2008

박막태양전지에서 p-layer, i-layer, n-layer의 thickness와 doping concentration은 가장 기본이 되는 요소이다. 각 layer에서 위 두 가지 요소를 ASA simulator를 이용해서 높은 효율을 갖는 박막태양전지를 설계하기 위해 조절하였다. Simulation결과 p-layer의 thickness는 $9.5*10^{-9}m$, doping concentration은 0.2eV, i-layer의 thickness는 $4.535*10^{-7}m$, n-layer의 thickness는 $2*10^{-8}m$, doping concentration 은 0.1eV에서 최종 11.48%의 효율을 얻을 수 있었다. 본 연구를 통하여 높은 효율의 박막태양전지 설계 시에 도움이 될 수 있을 것이다.

• EDISON SW 활용 경진대회 논문집
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• 제2회(2013년)
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• pp.266-268
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• 2013

In this paper, we study the channel doping concentration characteristics of junctionless nanowire transistors (JLT) using Edison nanowire FET device simulation. JLT has no junctions by very simple fabrication process. And this device has less variability and better electrical properties than classical inversion-mode transistors with PN junctions at the source and drain. In this simulation we use tri-gate structure. Source and drain doping concentration is $10^{20}atoms/cm^3$. The simulation results show that I-V characteristics of JLT change due to the variation of channel doping concentration.

• Journal of Industrial and Engineering Chemistry
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• 제68권
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• pp.350-354
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• 2018

Lifetime study of blue phosphorescent and thermally activated delayed fluorescent organic light-emitting diodes was carried out to understand the dominant degradation process during electrical operation of the devices. Doping concentration dependence of the phosphorescent and thermally activated delayed fluorescent organic light-emitting diodes was studied, which demonstrated long lifetime at low doping concentration in the phosphorescent devices and at high doping concentration in the thermally activated delayed fluorescent devices. Detailed mechanism study of the two devices described that triplet-triplet annihilation is the main degradation process of phosphorescent organic light-emitting diodes, whereas triplet-polaron annihilation is the key degradation factor of the thermally activated delayed fluorescent devices.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2014년도 춘계학술대회
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• pp.748-751
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• 2014

본 연구에서는 비대칭 이중게이트(double gate; DG) MOSFET의 채널 도핑농도 변화에 따른 문턱전압이동현상에 대하여 분석하였다. 비대칭 DGMOSFET는 일반적으로 저농도로 채널을 도핑하여 완전결핍상태로 동작하도록 제작한다. 불순물산란의 감소에 의한 고속동작이 가능하므로 고주파소자에 응용할 수 있다는 장점이 있다. 미세소자에서 필연적으로 발생하고 있는 단채널효과 중 문턱전압이동현상이 비대칭 DGMOSFET의 채널도핑농도의 변화에 따라 관찰하고자 한다. 문턱전압을 구하기 위하여 해석학적 전위분포를 포아송방정식으로부터 급수형태로 유도하였다. 채널길이와 두께, 산화막두께 및 도핑분포함수의 변화 등을 파라미터로 하여 도핑농도에 따라 문턱전압의 이동현상을 관찰하였다. 결과적으로 도핑농도가 증가하면 문턱전압이 증가하였으며 채널길이가 감소하면 문턱전압이 크게 감소하였다. 또한 채널두께와 하단게이트 전압이 감소하면 문턱전압이 크게 증가하는 것을 알 수 있었다. 마지막으로 산화막두께가 감소하면 문턱전압이 증가하는 것을 알 수 있었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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• pp.450-451
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• 2008

비정질 실리콘 태양전지는 n-i-p형 구조가 일반적이며, 각 층의 두께와 도핑농도가 태양전지의 효율을 결정하는 중요한 요인이다. 최대의 효율을 얻을 수 있는 태양전지 설계를 위해 AFORS HET 시뮬레이션을 통하여 n층의 두께와 도핑농도, 그리고 p층의 도핑농도롤 변화시켰다. 최적화 결과, a-Si:H(n) 층의 두께 1nm, a-Si:H(n)층의 도핑농도 $2\times10^{20}cm^{-3}$, a-Si:H(p+)층의 도핑농도 $1\times10^{19}cm^{-3}$에서 $V_{oc}$=679.5mV, $J_{sc}$=39.02mA/$cm^2$, FF=83.71%, Efficiency=22.21%의 고효율을 얻을 수 있다. 본 연구를 통하여 실제의 높은 효율을 갖는 태양전지 설계와 제조 시에 이용할 수 있을 것이다.

• Transactions on Electrical and Electronic Materials
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• 제17권5호
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• pp.270-274
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• 2016

This article investigates the use of the Gaussian-channel doping profile for the control of the short-channel effects in the double-gate MOSFET whereby a two-dimensional (2D) quantum simulation was used. The simulations were completed through a self-consistent solving of the 2D Poisson equation and the Schrodinger equation within the non-equilibrium Green’s function (NEGF) formalism. The impacts of the p-type-channel Gaussian-doping profile parameters such as the peak doping concentration and the straggle parameter were studied in terms of the drain current, on-current, off-current, sub-threshold swing (SS), and drain-induced barrier lowering (DIBL). The simulation results show that the short-channel effects were improved in correspondence with incremental changes of the straggle parameter and the peak doping concentration.