• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.5
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• pp.982-988
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• 2012

This paper has presented the relation of scaling theory and threshold voltage of double gate(DG) MOSFET. In the case of conventional MOSFET, current and switching frequency have been analyzed based on scaling theory. To observe the possibility of application of scaling theory for threshold voltage of DGMOSFET, the change of threshold voltage has been observed and analyzed according to scaling theory. The analytical potential distribution of Poisson equation has been used, and this model has been already verified. To solve Poisson equation, charge distribution such as Gaussian function has been used. As a result, it has been observed that threshold voltage is grealty changed according to scaling factor and change rate of threshold voltages is traced for scaling of doping concentration in channel. This paper has explained for the best modified scaling theory reflected the influence of two gates as using weighting factor when scaling theory has been applied for channel length and channel thickness.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.865-868
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• 2006

In this paper, the subthreshold swing has been analyzed for double gate FinFET under channel length of 20nm. The analytical current model has been developed, including thermionic current and tunneling current models. The potential distribution by Poisson equation and carrier distribution by Maxwell-Boltzman statistics are used to calculate thermionic emission current, and WKB(Wentzel-Framers-Brillouin) approximation to tunneling current. The cutoff current is obtained by simple adding two currents since two current is independent. The subthreshold swings by this model are compared with those by two dimensional simulation and two values are good agreement. Since the tunneling current increases especially under channel length of 10nm, the characteristics of subthreshold swing is degraded. The channel and gate oxide thickness have to be fabricated as thin as possible to decrease this short channel effects and this process has to be developed. The subthreshold swings as a function of channel doping concentrations are obtained.

• Journal of the Korean Electrochemical Society
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• v.7 no.3
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• pp.131-137
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• 2004

Sol-gel method which provides better electrochemical and physiochemical properties compared to the solid-state method was used to synthesize the material of $LiFe_yMn_{2-y}O_4$. Fe was substituted to increase the structural stability so that the effects of the substitution amount and sintering temperature were analyzed. XRD was used for the structural analysis of produced material, which in turn, showed the same cubic spinel structure as $LiMn_2O_4$ despite the substitution of $Fe^{3+}$. During the synthesis of $LiFe_yMn_{2-y}O_4$, as the sintering temperature and the doping amount of Fe(y=0.05, 0.1, 0.2)were increased, grain growth proceeded which in turn, showed a high crystalline and a large grain size, certain morphology with narrow specific surface area and large pore volume distribution was observed. In order to examine the ability for the practical use of the battery, charge-discharge tests were undertaken. When the substitution amount of $Fe^{3+}\;into\;LiMn_2O_4$ increased, the initial discharge capacity showed a tendency to decrease within the region of $3.0\~4.2V$ but when charge-discharge processes were repeated, other capacity maintenance properties turned out to be outstanding. In addition, when the sintering temperature was $800\~850^{\circ}C$, the initial capacity was small but showed very stable cycle performance. According to EVS(electrochemical voltage spectroscopy) test, $LiFe_yMn_{2-y}O_4(y=0,\;0.05,\;0.1,\;0.2)$ showed two plateau region and the typical peaks of manganese spinel structure when the substitution amount of $Fe^{3+}$ increased, the peak value at about 4.15V during the charge-discharge process showed a tendency to decrease. From the previous results, the local distortion due to the biphase within the region near 4.15V during the lithium extraction gave a phase transition to a more suitable single phase. When the transition was derived, the discharge capacity decreased. However the cycle performance showed an outstanding result.

• Proceedings of the Korean Society of Medical Physics Conference
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• 2003.09a
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• pp.45-45
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• 2003

The aim of this study was the characterization and performance validation of new prototype avalanche photodiode (APD) arrays for positron emission tomography (PET). Two different APD array prototypes (noted A and B) developed by Radiation Monitoring Device (RMD) have been investigated. Principal characteristics of the two APD array were measured and compared. In order to characterize and evaluate the APD performance, capacitance, doping concentration, quantum efficiency, gain and dark current were measured. The doping concentration that shows the impurity distribution within an APD pixel as a function of depth was derived from the relationship between capacitance and bias voltage. Quantum efficiency was measured using a mercury vapor light source and a monochromator used to select a wavelength within the range of 300 to 700 nm. Quantum efficiency measurements were done at 500 V, for which the APD gain is equal to one. For the gain measurements, a pencil beam with 450 nm in wavelength was illuminating the center of each pixel. The APD dark currents were measured as a function of gain and bias. A linear fitting method was used to determine the value of surface and bulk leakage currents. Mean quantum efficiencies measured at 400 and 450 nm were 0.41 and 0.54, for array A, and 0.50 and 0.65 for array B. Mean gain at a bias voltage of 1700 V, was 617.6 for array A and 515.7 for type B. The values based on linear fitting were 0.08${\pm}$0.02 nA 38.40${\pm}$6.26 nA, 0.08${\pm}$0.0l nA 36.87${\pm}$5.19 nA, and 0.05${\pm}$0.00 nA, 21.80${\pm}$1.30 nA in bulk surface leakage current for array A and B respectively. Results of characterization demonstrate the importance of performance measurement validating the capability of APD array as the detector for PET imaging.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.36 no.4
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• pp.413-417
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• 2023

Gallium Oxide (Ga₂O₃) is preferred as a material for next generation power semiconductors. The Ga₂O₃ should solve the disadvantages of low thermal resistance characteristics and difficulty in forming an inversion layer through p-type ion implantation. However, Ga₂O₃ is difficult to inject p-type ions, so it is being studied in a heterojunction structure using p-type oxides, such as NiO, SnO, and Cu₂O. Research the lateral-type FET structure of NiO/Ga₂O₃ heterojunction under the Gate contact using the Sentaurus TCAD simulation. At this time, the VG-ID and VD-ID curves were identified by the thickness of the Epi-region (channel) and the doping concentration of NiO of 1×10¹⁷ to 1×10¹⁹ cm-3. The increase in Epi region thickness has a lower threshold voltage from -4.4 V to -9.3 V at I_D = 1×10^-8 mA/mm, as current does not flow only when the depletion of the PN junction extends to the Epi/Sub interface. As an increase of NiO doping concentration, increases the depletion area in Ga₂O₃ region and a high electric field distribution on PN junction, and thus the breakdown voltage increases from 512 V to 636 V at I_D =1×10^-3 A/mm.

• Clean Technology
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• v.29 no.4
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• pp.255-261
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• 2023

Power semiconductors are semiconductors used for power conversion, transformation, distribution, and control. Recently, the global demand for high-voltage power semiconductors is increasing across various industrial fields, and optimization research on high-voltage IGBT components is urgently needed in these industries. For high-voltage IGBT development, setting the resistance value of the wafer and optimizing key unit processes are major variables in the electrical characteristics of the finished chip. Furthermore, the securing process and optimization of the technology to support high breakdown voltage is also important. Etching is a process of transferring the pattern of the mask circuit in the photolithography process to the wafer and removing unnecessary parts at the bottom of the photoresist film. Ion implantation is a process of injecting impurities along with thermal diffusion technology into the wafer substrate during the semiconductor manufacturing process. This process helps achieve a certain conductivity. In this study, dry etching and wet etching were controlled during field ring etching, which is an important process for forming a ring structure that supports the 3.3 kV breakdown voltage of IGBT, in order to analyze four conditions and form a stable body junction depth to secure the breakdown voltage. The field ring ion implantation process was optimized based on the TEG design by dividing it into four conditions. The wet etching 1-step method was advantageous in terms of process and work efficiency, and the ring pattern ion implantation conditions showed a doping concentration of 9.0E13 and an energy of 120 keV. The p-ion implantation conditions were optimized at a doping concentration of 6.5E13 and an energy of 80 keV, and the p+ ion implantation conditions were optimized at a doping concentration of 3.0E15 and an energy of 160 keV.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.05a
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• pp.683-685
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• 2012

This paper have presented the analysis of the change for threshold voltage and drain induced barrier lowering among short channel effects occurred in subthreshold region for double gate(DG) MOSFET with two gates to be next-generation devices, based on scaling theory. To obtain the analytical solution of Poisson's equation, Gaussian function been used as carrier distribution to analyze closely for experimental results, and the threshold characteristics have been analyzed for device parameters such as channel thickness and doping concentration and projected range and standard projected deviation of Gaussian function. Since this potential model has been verified in the previous papers, we have used this model to analyze the threshold chatacteristics. As a result to apply scaling theory, we know the threshold voltage and drain induced barrier lowering is changed, and the deviation rate is changed for device parameters for DGMOSFET.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.05a
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• pp.693-695
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• 2012

This paper have presented the breakdown voltage for double gate(DG) MOSFET. The analytical solution of Poisson's equation and Fulop's breakdown condition have been used to analyze for breakdown voltage. The double gate(DG) MOSFET as the device to be able to use until nano scale has the adventage to reduce the short channel effects. But we need the study for the breakdown voltage of DGMOSFET since the decrease of the breakdown voltage is unavoidable. To approximate with experimental values, we have used the Gaussian function as charge distribution for Poisson's equation, and the change of breakdown voltage has been observed for device geometry. Since this potential model has been verified in the previous papers, we have used this model to analyze the breakdown voltage. As a result to observe the breakdown voltage, the smaller channel length and the higher doping concentration become, the smaller the breakdown voltage becomes. Also we have observed the change od the breakdown voltage for gate oxide thickness and channel thickness.

• Current Photovoltaic Research
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• v.2 no.1
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• pp.28-35
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• 2014

High-efficiency in $Cu(In,Ga)Se_2$ (CIGS) solar cells were usually achieved on soda-lime glass substrates due to Na incorporation that reduces deep-level defects. However, this supply of sodium from sodalime glass to CIGS through Mo back electrode could be limited at low deposition temperature. Na content could be more precisely controlled by supplying Na from known amount of an outside source. For the purpose, an $Na_2S$ layer was deposited on Mo electrode prior to CIGS film deposition and supplied to CIGS during CIGS film. With the $Na_2S$ underlayer a more uniform component distribution was possible at $350^{\circ}C$ and efficiency was improved compared to the cell without $Na_2S$ layer. With more precise control of bulk and surface component profile, CIGS film can be deposited at low temperature and could be useful for flexible CIGS solar cells.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.402.1-402.1
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• 2016

The performance of solid oxide fuel cells (SOFCs) is directly related to the electrocatalytic activity of composite electrodes in which triple phase boundaries (TPBs) of metallic catalyst, oxygen ion conducting support, and gas should be three-dimensionally maximized. The distribution morphology of catalytic nanoparticle dispersed on external surfaces is of key importance for maximized TPBs. Herein in situ grown nickel nanoparticle onto the surface of fluorite oxide is demonstrated employing gadolium-nickel co-doped ceria ($Gd0.2-xNixCe0.8O2-{\delta}$, GNDC) by reductive annealing. GNDC powders were synthesized via a Pechini-type sol-gel process while maximum doping ratio of Ni into the cerium oxide was defined by X-ray diffraction. Subsequently, NiO-GNDC composite were screen printed on the both sides of yttrium-stabilized zirconia (YSZ) pellet to fabricate the symmetrical half cells. Electrochemical impedance spectroscopy (EIS) showed that the polarization resistance was decreased when it was compared to conventional Ni-GDC anode and this effect became greater at lower temperature. Ex situ microstructural analysis using scanning electron microscopy after the reductive annealing exhibited the exsolution of Ni nanoparticles on the fluorite phases. The influence of Ni contents in GNDC on polarization characteristics of anodes were examined by EIS under H2/H2O atmosphere. Finally, the addition of optimized GNDC into the anode functional layer (AFL) dramatically enhanced cell performance of anode-supported coin cells.