• International Journal of Internet, Broadcasting and Communication
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• v.7 no.2
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• pp.161-167
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• 2015

The performance of high power LEDs highly depends on the junction temperature. Operating at high junction temperature causes elevation of the overall thermal resistance which causes degradation of light intensity and lifetime. Thus, appropriate thermal management is critical for LED packaging. The main goal of this research is to improve thermal resistance by optimizing and comparing nano-pore silicon-based thermal substrate to insulated metal substrate and direct bonded copper thermal substrate. The thermal resistance of the packages are evaluated using computation fluid dynamic approach for 1 W single chip LED module.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.1
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• pp.63-70
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• 2023

Today, the importance of power semiconductors continues to increase due to serious environmental pollution and the importance of energy. Particularly, SiC-MOSFET, which is one of the wide bandgap (WBG) devices, has excellent high voltage characteristics and is very important. However, since the electrical properties of SiC-MOSFET are heatsensitive, thermal management through a package is necessary. In this paper, we propose an insulated metal substrate (IMS) method rather than a direct bonded copper (DBC) substrate method used in conventional power semiconductors. IMS is easier to process than DBC and has a high coefficient of thermal expansion (CTE), which is excellent in terms of cost and reliability. Although the thermal conductivity of the dielectric film, which is an insulating layer of IMS, is low, the low thermal conductivity can be sufficiently overcome by allowing a process to be very thin. Electric-thermal co-simulation was carried out in this study to confirm this, and DBC substrate and IMS were manufactured and experimented for verification.

• Journal of the Korean institute of surface engineering
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• v.54 no.5
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• pp.207-212
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• 2021

The mechanical and electrical characteristics can be improved in 3D stacked IC technology which can accomplish the ultra-high integration by stacking more semiconductor chips within the limited package area through the Cu direct bonding method minimizing the performance degradation to the bonding surface to the inorganic compound or the oxide film etc. The surface was treated in a ultrasonic washer using a diamond abrasive to remove other component substances from the prepared cast plate substrate surface. FE-SEM was used to analyze the bonding characteristics of the bonded copper substrates, and the cross section of the bonded Cu conjugates at the sintering junction temperature of 100 ℃, 150 ℃, 200 ℃, 350 ℃ and the pressure of 2303 N/cm² and 3087 N/cm². At 2303 N/cm², the good bonding of copper substrate was confirmed at 350 ℃, and at the increased pressure of 3087 N/cm², the bonding condition of Cu was confirmed at low temperature junction temperature of 200 ℃. However, the recrystallization of Cu particles was observed due to increased pressure of 3087 N/cm² and diffusion of Cu atoms at high temperature of 350 ℃, which can lead to degradation in semiconductor manufacturing.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2018.06a
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• pp.102-102
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• 2018

Electronic industry had required the finer size and the higher performance of the device. Therefore, 3-D die stacking technology such as TSV (through silicon via) and micro-bump had been used. Moreover, by the development of the 3-D die stacking technology, 3-D structure such as chip to chip (c2c) and chip to wafer (c2w) had become practicable. These technologies led to the appearance of HBM (high bandwidth memory). HBM was type of the memory, which is composed of several stacked layers of the memory chips. Each memory chips were connected by TSV and micro-bump. Thus, HBM had lower RC delay and higher performance of data processing than the conventional memory. Moreover, due to the development of the IT industry such as, AI (artificial intelligence), IOT (internet of things), and VR (virtual reality), the lower pitch size and the higher density were required to micro-electronics. Particularly, to obtain the fine pitch, some of the method such as copper pillar, nickel diffusion barrier, and tin-silver or tin-silver-copper based bump had been utillized. TCB (thermal compression bonding) and reflow process (thermal aging) were conventional method to bond between tin-silver or tin-silver-copper caps in the temperature range of 200 to 300 degrees. However, because of tin overflow which caused by higher operating temperature than melting point of Tin ($232^{\circ}C$), there would be the danger of bump bridge failure in fine-pitch bonding. Furthermore, regulating the phase of IMC (intermetallic compound) which was located between nickel diffusion barrier and bump, had a lot of problems. For example, an excess of kirkendall void which provides site of brittle fracture occurs at IMC layer after reflow process. The essential solution to reduce the difficulty of bump bonding process is copper to copper direct bonding below $300^{\circ}C$. In this study, in order to improve the problem of bump bonding process, copper to copper direct bonding was performed below $300^{\circ}C$. The driving force of bonding was the self-annealing properties of electrodeposited Cu with high defect density. The self-annealing property originated in high defect density and non-equilibrium grain boundaries at the triple junction. The electrodeposited Cu at high current density and low bath temperature was fabricated by electroplating on copper deposited silicon wafer. The copper-copper bonding experiments was conducted using thermal pressing machine. The condition of investigation such as thermal parameter and pressure parameter were varied to acquire proper bonded specimens. The bonded interface was characterized by SEM (scanning electron microscope) and OM (optical microscope). The density of grain boundary and defects were examined by TEM (transmission electron microscopy).

• Bulletin of the Korean Chemical Society
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• v.30 no.5
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• pp.1113-1117
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• 2009

The one-dimensional coordination polymers, $[Cu^{II}(L)(NO_3)_2]_n$ (1) and {$[Cu^{II}(L)(NO_3)]{\cdot}2H_2O}_{2n} (2), were synthesized from $Cu(NO_3)_2{\cdot}3H_2O$ and 2-[(pyridin-3-ylmethyl)amino]ethanol (L, PMAE) in methanol by controlling the molar ratio of copper(II) salt. Copper(II) ion in 1 has one pyridine group of PMAE whose an aminoethanol group coordinates adjacent copper(II) ion. As the pyridine group is bonded to neighboring copper(II) ion, 1 becomes a one-dimensional chain. Contrary to 1, the structure of 2 shows that the oxygen atom of ethoxide group is bridged between two copper(II) ions, which forms a dinuclear complex. Additionally, the pyridine group of PMAE included one dinuclear unit is coordinated to the other dimeric one each other, which leads to a one-dimensional polymer. Due to the structural differences, 1 exhibits weak antiferromagnetic interaction, while 2 shows strong antiferromagnetic interaction. Due to direct spin exchange via oxygen of PMAE 2 has a much strong spin coupling than 1.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.1
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• pp.9-15
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• 2008

Mokumegane is one of the sophisticated metal craft techniques enabling wood grain surface effect. To embody the mokumegane, an ingot of well-bonded stacked metal plates has been required. Traditionally prepared mokumegane ingots were bonded using charcoal which enables reduction atmosphere, but sometimes end up with collapse of bonding interface due to the lack of reliable process control. We proposed a systematic vacuum direct bonding process for ingots. First, we confirmed copper//copper homogeneous plate bonding at $900^{\circ}C$ by applying uniaxial press of 2.5kg. We observed 80min required to obtain 90%-bonding ratio and the diffusion coefficient would be enhanced up to 100 times due to surface effect. Second, by considering enhanced diffusion behavior, we also obtained optimum bonding condition in copper/silver heterogeneous plates that ensures 90%-bonding ratio at $700^{\circ}C$ for 10min with apply uniaxial press. A 7-layered copper/silver ingot is prepared successfully, and eventually the prototype mokumegane cases for mobile phone were fabricated with these ingot.

• Bulletin of the Korean Chemical Society
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• v.13 no.4
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• pp.363-367
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• 1992

The crystal structure of (1,3,6,9,11,14-hexaazatricycol[12.2.1.$1^{6,9}$]octadecane)copper(Ⅱ) perchlorate, Cu($C_{12}H_{26}N_6$)$(ClO_4)_2$, has been determined by the X-ray diffraction methods. The crystal data are as follows: Mr=516.9, triclinic, ${\alpha}=8.572\;(2)$, b=8.499 (3), c=15.204 (3) ${\AA}$, ${\alpha}=80.42\;(5),\;{\beta}=73.57\;(3),\;{\gamma}=69.82\;(4)^{\circ},\;V=994.2\;{\AA}^3,\;D_C=1.726\;gcm^{-3}$, space group $P{\tilde{1}},\;Z=2,\;{\mu}=21.27\;cm^{-1}&, F(000)=534 and T=297 K. The structure was solved by direct methods and refined by full-matrix least-squares methods to and R value of 0.081 for 1608 observed reflections measured with graphite-mono-chromated Mo Ka radiation on a diffractometer. There are two independent complexes in the unit cell. The two copper ions lie at the special positions (1/2, 0, 0) and (0, 1/2, 1/2)and each complex possesses crystallographic center of symmetry. Each Cu ion is coordinated to four nitrogen donors if the hexaazamacrotricyclic ligand and weakly interacts with two oxygen atoms of the perchlorate ions to form a tetragonally distorted octahedral coordination geometry. The Cu_N (sec), Cu_N(tert) and Cu_O coordination distances are 1.985 (14), 2.055 (14) and 2.757 (13) ${\AA}$ for the complex A and 1.996 (10), 2.040 (11) and 2.660 (13) ${\AA}$ for the complex B, respectively. The macrocycles in the two independent cations assume a similar conformation with the average r.m.s. deviation of 0.073 ${\AA}$. Two 1,3-diazacyclopentane ring moieties of the hexaazamacrotricyclic ligand are placed oppositely and almost perpendicularly to the square coordination plane of the ruffled 14-membered macrocycle. The secondary N atoms are hydrogen-bonded to the perchlorate O atoms with distances of 3.017 (23) and 3.025 (19) ${\AA}$ for the complexes A and B, respectively.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.4
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• pp.7-13
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• 2019

Power module is getting attention from electronic industries such as solar cell, battery and electric vehicles. Transient liquid phase (TLP) boding, sintering with Ag and Cu powders and wire bonding are applied to power module packaging. Sintering is a popular process but it has some disadvantages such as high cost, complex procedures and long bonding time. Meanwhile, TLP bonding has lower bonding temperature, cost effectiveness and less porosity. However, it also needs to improve ductility of the intermetallic compounds (IMCs) at the joint. Wire boding is also an important interconnection process between semiconductor chip and metal lead for direct bonded copper (DBC). In this study, TLP bonding using Sn-based solders and wire bonding process for power electronics packaging are described.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.485-486
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• 2015

This paper introduces the new 1200V $SPM^{(R)}$ (Smart Power Module), which is fully optimized and intelligent integrated IGBT inverter modules for up to 6kW motor drive applications. It utilizes newly developed NPT trench IGBT with the advanced STEALTHTM freewheeling diode, and built-in bootstrap diode. HVICs, multi-function LVIC, and built-in thermistor provide good reliable characteristics for the entire system. This module also takes technical advantage of DBC(Direct Bonded Copper) substrate for the better thermal performance. This paper provides an overall description of the newly developed 1200V/35A $SPM^{(R)}$ 2 product.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2016.11a
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• pp.129.1-129.1
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• 2016

반도체, 디스플레이, PC 등 전자기기의 경우 소자 내 발생된 열로 인해 기기의 성능 및 효율, 수명 등이 감소하기 때문에 이러한 내부 열을 외부로 방출시켜줄 필요가 있다. 일반적으로 heat pipe나 냉각 팬(fan) 등의 외부장치에 의해 강제적으로 냉각해주는 기술이 있지만 휴대용 디바이스와 같이 작은 전자기기의 경우 소자 자체적으로 열전도 특성이 뛰어난 기판을 사용하여 열전도에 의해 열이 소자 밖으로 방출될 수 있도록 방열 설계를 해주어야 한다. 따라서 소자 전체를 지지해주고 열전도에 의해 방열 기능을 해주는 방열기판에 대한 관심이 증가하고 있다. 현재 가장 많이 사용되어지는 세라믹 방열기판으로는 알루미나가 있지만 보다 소자의 집적화와 고성능화로 인하여 열전도도가 높은 질화규소 기판의 요구가 증대되고 있다. 하지만 이러한 질화규소기판에 금속전극을 형성하는 기술은 종래의 알루미나 기판에 이용한 DPC(Direct Plated Copper), DBC(Direct Bonded Copper)기술을 적용할 수 없다. 그래서 현재는 메탈블레이징을 이용하여 전극을 형성하지만 공정비용 및 대형기판에 형성이 어려운 단점이 있다. 따라서, 본 연구에서는 질화규소 방열기판에 전기화학공정을 통하여 밀착력이 우수한 금속 전극 회로층 형성에 대한 연구를 진행하였다. 질화규소 방열기판에 무전해 Ni 도금을 통하여 금속층을 형성하는데 이 때 세라믹 기판과 금속층 사이의 낮은 밀착력을 향상시키기 위해 습식공정을 통하여 표면처리를 진행하였다. 또한 촉매층을 $Pd-TiO_2$ 층을 이용하여 무전해 도금공정을 이용하여 Ni, 전극층을 형성하였다. 질화규소 표면에 OH기 형성을 확인하기 위해 FT-IR(Fourier-transform infrared spectroscopy)분석을 실시하였으며 OH 그룹 형성 및 silane의 화학적 결합으로 인해 금속 전극층의 밀착력이 향상된 것을 cross hatch test 및 scratch test를 통해 확인하였고 계면 및 표면형상 특성 등을 분석하기 위해 TEM(Transmission electron microscopy), SEM(Scanning electron microscopy), AFM(Atomic-force microscopy)등의 장비를 이용하였다.